linux-kernel - Re: [PATCH v9 0/3] Cavium ThunderX2 SMMUv3 errata workarounds

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Message-ID: <20170622182257.GI15336@arm.com>
Date:   Thu, 22 Jun 2017 19:22:57 +0100
From:   Will Deacon <will.deacon@....com>
To:     Geetha sowjanya <gakula@...iumnetworks.com>
Cc:     robin.murphy@....com, lorenzo.pieralisi@....com,
        hanjun.guo@...aro.org, sudeep.holla@....com,
        iommu@...ts.linux-foundation.org, robert.moore@...el.com,
        lv.zheng@...el.com, rjw@...ysocki.net, jcm@...hat.com,
        linux-kernel@...r.kernel.org, robert.richter@...ium.com,
        catalin.marinas@....com, sgoutham@...ium.com,
        linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
        geethasowjanya.akula@...il.com, devel@...ica.org,
        linu.cherian@...ium.com, Charles.Garcia-Tobin@....com,
        robh@...nel.org
Subject: Re: [PATCH v9 0/3] Cavium ThunderX2 SMMUv3 errata workarounds

On Thu, Jun 22, 2017 at 05:35:35PM +0530, Geetha sowjanya wrote:
> Cavium ThunderX2 SMMUv3 implementation has two Silicon Erratas.
> 1. Errata ID #74
>    SMMU register alias Page 1 is not implemented
> 2. Errata ID #126
>    SMMU doesnt support unique IRQ lines and also MSI for gerror,
>    eventq and cmdq-sync
> 
> The following patchset does software workaround for these two erratas.

I've picked up the first two patches, and left comments on the final patch.

Will