linux-kernel - Re: [PATCH] MIPS: perf: fix build failure

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Message-ID: <2816265a-d5be-60eb-1428-4dd93e2aeb72@imgtec.com>
Date:   Mon, 26 Jun 2017 08:44:48 +0200
From:   Marcin Nowakowski <marcin.nowakowski@...tec.com>
To:     Sudip Mukherjee <sudipm.mukherjee@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Ralf Baechle <ralf@...ux-mips.org>
CC:     <linux-kernel@...r.kernel.org>, <linux-mips@...ux-mips.org>
Subject: Re: [PATCH] MIPS: perf: fix build failure

Hi Sudip,

This patch fixes the build error, but leaves the I6500 handling incorrect.
I had explained to Ralf how the build should be fixed a while ago so 
hopefully he will fix it up in his -next branch (dd71e57bacb5 should 
have been applied on top of f7a31b5e7874, but in Ralf's tree 
f7a31b5e7874 is applied on v4.12-rc4 while dd71e57bacb5 is applied on 
v4.12-rc2).
You can see what those commits should look like by examining patchwork 
submissions (links available in commit descriptions).

Marcin

On 23.06.2017 23:52, Sudip Mukherjee wrote:
> The build of gpr_defconfig is failing with the error:
> arch/mips/kernel/perf_event_mipsxx.c:
> 	In function 'mipsxx_pmu_map_raw_event':
> arch/mips/kernel/perf_event_mipsxx.c:1614:2:
> 	error: duplicate case value
> 
> Patch - f7a31b5e7874 ("MIPS: perf: Remove incorrect odd/even counter
> handling for I6400") removed the previous case and added it as a
> separate case. But patch dd71e57bacb5 ("MIPS: perf: add I6500 handling")
> added it back to its old location and thus giving us two duplicate case.
> 
> Fixes: dd71e57bacb5 ("MIPS: perf: add I6500 handling")
> Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@...il.com>
> ---
> 
> The build log is available at:
> https://travis-ci.org/sudipm-mukherjee/parport/jobs/246092909
> 
>   arch/mips/kernel/perf_event_mipsxx.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
> index 4b93cc0..733b612 100644
> --- a/arch/mips/kernel/perf_event_mipsxx.c
> +++ b/arch/mips/kernel/perf_event_mipsxx.c
> @@ -1597,7 +1597,6 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
>   		break;
>   	case CPU_P5600:
>   	case CPU_P6600:
> -	case CPU_I6400:
>   	case CPU_I6500:
>   		/* 8-bit event numbers */
>   		raw_id = config & 0x1ff;
>