linux-kernel - Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV

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Message-ID: <8eaabcb6-c7b1-efcc-7dae-967a38feb8f1@microchip.com>
Date:   Mon, 26 Jun 2017 11:43:01 +0300
From:   m18063 <Claudiu.Beznea@...rochip.com>
To:     Zhi Mao <zhi.mao@...iatek.com>, <john@...ozen.org>,
        Thierry Reding <thierry.reding@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        <linux-pwm@...r.kernel.org>
CC:     <zhenbao.liu@...iatek.com>, <devicetree@...r.kernel.org>,
        <srv_heupstream@...iatek.com>, <sean.wang@...iatek.com>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>, <yt.shen@...iatek.com>,
        <yingjoe.chen@...iatek.com>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX



On 23.06.2017 08:08, Zhi Mao wrote:
> Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config()
> to improve the code readablity.
> 
> Signed-off-by: Zhi Mao <zhi.mao@...iatek.com>
> ---
>  drivers/pwm/pwm-mediatek.c |    6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> index 554a042..e5f6425 100644
> --- a/drivers/pwm/pwm-mediatek.c
> +++ b/drivers/pwm/pwm-mediatek.c
> @@ -30,6 +30,8 @@
>  #define PWMDWIDTH		0x2c
>  #define PWMTHRES		0x30
>  
> +#define PWM_CLK_DIV_MAX		7
> +
>  enum {
>  	MTK_CLK_MAIN = 0,
>  	MTK_CLK_TOP,
> @@ -130,8 +132,10 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
>  		clkdiv++;
>  	}
>  
> -	if (clkdiv > 7)
> +	if (clkdiv > PWM_CLK_DIV_MAX) {
You forgot to:
		mtk_pwm_clk_disable(chip, pwm);
> +		dev_err(chip->dev, "period %d not supported\n", period_ns);
>  		return -EINVAL;
> +	}
>  
>  	mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv);
>  	mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
>