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Date: Tue, 27 Jun 2017 10:38:59 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Vivek Unune <npcomplete13@...il.com>
Cc: Andrew Lunn <andrew@...n.ch>, hauke@...ke-m.de, zajec5@...il.com,
bcm-kernel-feedback-list@...adcom.com, robh+dt@...nel.org,
mark.rutland@....com, linux@...linux.org.uk,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] ARM: dts: BCM5301X: Add support for Linksys EA9500
Hi Vivek,
On 06/27/2017 10:03 AM, Vivek Unune wrote:
> On Wed, Mar 15, 2017 at 5:19 PM, Florian Fainelli
> <florian.fainelli@...adcom.com> wrote:
>> On 03/15/2017 01:18 PM, Vivek Unune wrote:
>>> Thanks Florian.
>>>
>>> Let me try this out. First I'll try to figure out how to add a mdio node.
>>>
>>> Over the weekend I was trying enable DSA driver, but did not see DSA
>>> under network. I'm using LEDE source with kernel 4.9. Nor did I see it
>>> when I tried 'make kernel_menuconfig'
>>
>> (please don't top post on public mailing lists)
>>
>> You need to enable SWITCHDEV to have DSA. AFAIR SWITCHDEV may depend on
>> EXPERT/EXPERIMENTAL as of 4.9 (or that was before).
>>
>
> Florian,
>
> I have managed to use DSA driver and was able detect both internal and
> external switches. However, I only get packets flowing only through the
> internal switch. I have used the ip & bridge commands to setup the vlan
> 101 & 102 for lan and wan respectively.
>
> VLAN101 = lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8 eth0.101
That looks reasonable although keep in mind that the IMP/CPU interfaces
of the switch are configured with VLAN tags (see commit [1]), so you may
need to make sure that port 0 of the internal switch is not accidentally
configured back to untagged since that would cause problem when
terminating the VLAN tag on the SW side.
So here are a few things that you want to check:
- read the MIB counters from the "extswitch" interface and see if
packets flow through in both directions with no errors
- check the "extswitch" VLAN configuration on both the internal switch
side (port 0) and on the external switch side ("cpu", port 8, not visible)
- see if you can get traffic end-to-end from eth0 all the way through
one of the external switch port. If that's the case, that means that the
configuration of internal switch port 0, internal switch CPU port, and
external switch external port is working and operational
[1]:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e47112d9d6009bf6b7438cedc0270316d6b0370d
> VLAN102 = wan eth0.102
>
> Reading configs from the factory firmware, I'm sure that sw0port0 and> sw1port8 are connected. Excerpt from the same:
>
> port_numbers=0 2 4 2 1 3 1 3
> port_switch_id=1 1 1 0 1 1 0 0
> port_names=port0 port1 port2 port3 port4 port5 port6 port7
Is 0 the identifier for the external or internal switch? If 0 is
internal switch identifier and 1 is the external switch identifier, your
mapping looks correct to me with one exception below:
> cpu_port_number=5 7 8
> cpu_port_switch_id=0 0 0
> hidden_port_numbers=0 8
> hidden_port_switch_id=0 1
>
> Below is my updated device tree.
>
> Thanks,
>
> Vivek
>
> &srab {
> compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
> status = "okay";
> dsa,member = <0 0>;
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@1 {
> reg = <1>;
> label = "lan7";
> };
>
> port@2 {
> reg = <2>;
> label = "lan4";
> };
>
> port@3 {
> reg = <3>;
> label = "lan8";
> };
>
> port@4 {
> reg = <4>;
> label = "wan";
> };
>
> port@5 {
> reg = <5>;
> ethernet = <&gmac0>;
> label = "cpu";
>
> fixed-link {
>
> speed = <1000>;
> full-duplex;
> };
> };
I think this is meant to be port 8 here based on the hidden_port_number
value. This actually matters for VLAN configuration because B53 is not
(unfortunately, to be fixed) consistently using dst->cpu_port (whatever
is configured in Device Tree) vs. dev->cpu_port (hardcoded to 8 for this
class of switch).
PS: on that front, we will have to rework that when we bring multiple
CPU port support in DSA/B53/bcm_sf2 and so for now what we could do is
just check that the configured CPU port in Device Tree is a valid CPU
port for that switch (typically 5, 7 or 8), and if not, just issue a
warning.
>
> sw0port0: port@0 {
> reg = <0>;
> label = "extswitch";
>
> fixed-link {
> speed = <1000>;
> full-duplex;
> };
There might be some additional configuration needed here for this port,
because by default, the port will most likely try to use its built-in
PHY and maybe that's what they did, they wired the built-in PHY directly
to the IMP port of the external switch.
> };
> };
> };
>
> &mdiomux {
> mdio-slave@0 {
> reg = <0x00>;
> address-cells = <1>;
> size-cells = <0>;
>
> switch@0 {
> compatible = "brcm,bcm53125";
> #address-cells = <1>;
> #size-cells = <0>;
> reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
> reset-names = "robo_reset";
> reg = <0>;
> dsa,member = <1 0>;
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> reg = <0>;
> label = "lan1";
> };
>
> port@1 {
> reg = <1>;
> label = "lan5";
> };
>
> port@2 {
> reg = <2>;
> label = "lan2";
> };
>
> port@3 {
> reg = <3>;
> label = "lan6";
> };
>
> port@4 {
> reg = <4>;
> label = "lan3";
> };
>
> sw1port8:port@8 {
> reg = <8>;
> ethernet = <&sw0port0>;
> label = "cpu";
> phy-mode = "rgmii-txid";
>
> fixed-link {
> speed = <1000>;
> full-duplex;
> };
> };
> };
> };
> };
> };
>
--
Florian
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