linux-kernel - Re: [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection register mask

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Message-ID: <CACRpkdYsWrT-q5baD-Y7RYs2aQ2J3suEcEe4G8GceJUYS7JXyQ@mail.gmail.com>
Date:   Thu, 29 Jun 2017 11:44:33 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:     "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Ken Ma <make@...vell.com>, Jason Cooper <jason@...edaemon.net>,
        Andrew Lunn <andrew@...n.ch>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>, Stefan Roese <sr@...x.de>,
        Nadav Haklai <nadavh@...vell.com>,
        Victor Gu <xigu@...vell.com>, Marcin Wojtas <mw@...ihalf.com>,
        Wilson Ding <dingwei@...vell.com>,
        Hua Jing <jinghua@...vell.com>,
        Neta Zur Hershkovits <neta@...vell.com>
Subject: Re: [PATCH 1/2] pinctrl: armada-37xx: Fix uart2 group selection
 register mask

On Fri, Jun 23, 2017 at 2:29 PM, Gregory CLEMENT
<gregory.clement@...e-electrons.com> wrote:

> From: Ken Ma <make@...vell.com>
>
> If north bridge selection register bit1 is clear, pins [10:8] are for
> SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
> GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
> and CTSn, so bit1 should be added to uart2 group and it must be set
> for both "gpio" and "uart" functions of uart2 group.
>
> Signed-off-by: Ken Ma <make@...vell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...e-electrons.com>

Patch applied.

Yours,
Linus Walleij