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Message-ID: <alpine.DEB.2.20.1707022117180.2296@nanos>
Date: Sun, 2 Jul 2017 21:18:39 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Dou Liyang <douly.fnst@...fujitsu.com>
cc: x86@...nel.org, linux-kernel@...r.kernel.org,
xen-devel@...ts.xenproject.org, mingo@...nel.org, hpa@...or.com,
ebiederm@...ssion.com, bhe@...hat.com, boris.ostrovsky@...cle.com,
peterz@...radead.org, izumi.taku@...fujitsu.com
Subject: Re: [PATCH v5 10/12] x86/xen: Bypass intr mode setup in enlighten_pv
system
On Fri, 30 Jun 2017, Dou Liyang wrote:
> xen_smp_ops overwrites smp_prepare_cpus to xen_pv_smp_prepare_cpus
> which initializes interrupt itself.
>
> Touching the intr_mode_init causes unexpected results on the system.
>
> Bypass it in enlighten_pv system.
So that's the wrong patch order then. You broke XEN at some point with your
changes. You need to prevent that breakage upfront not after the fact.
Thanks,
tglx
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