linux-kernel - Re: [PATCH 1/2] amd: uncore: Rename cpufeatures macro for cache counters

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <9daf5e04-0a1e-818f-f8b7-536e3dae3ba4@amd.com>
Date:   Thu, 6 Jul 2017 15:58:36 -0500
From:   "Natarajan, Janakarajan" <Janakarajan.Natarajan@....com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     linux-kernel@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: Re: [PATCH 1/2] amd: uncore: Rename cpufeatures macro for cache
 counters


On 6/6/2017 11:31 AM, Borislav Petkov wrote:
> On Mon, Jun 05, 2017 at 11:13:18AM -0500, Janakarajan Natarajan wrote:
>> In Family 17h, L3 is the last level cache as opposed to L2 in previous
>> families. Avoid this name confusion and rename X86_FEATURE_PERFCT_L2 to
>> X86_FEATURE_PERFCTR_LLC to indicate the performance counter on the last
>> level of cache.
>>
>> Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@....com>
>> ---
>>   arch/x86/events/amd/uncore.c       | 2 +-
>>   arch/x86/include/asm/cpufeatures.h | 2 +-
>>   2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
>> index 4d1f7f2d..8fea711 100644
>> --- a/arch/x86/events/amd/uncore.c
>> +++ b/arch/x86/events/amd/uncore.c
>> @@ -569,7 +569,7 @@ static int __init amd_uncore_init(void)
>>   		ret = 0;
>>   	}
>>   
>> -	if (boot_cpu_has(X86_FEATURE_PERFCTR_L2)) {
>> +	if (boot_cpu_has(X86_FEATURE_PERFCTR_LLC)) {
>>   		amd_uncore_llc = alloc_percpu(struct amd_uncore *);
>>   		if (!amd_uncore_llc) {
>>   			ret = -ENOMEM;
>> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
>> index b04bb6d..da422d6 100644
>> --- a/arch/x86/include/asm/cpufeatures.h
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -177,7 +177,7 @@
>>   #define X86_FEATURE_PERFCTR_NB  ( 6*32+24) /* NB performance counter extensions */
>>   #define X86_FEATURE_BPEXT	(6*32+26) /* data breakpoint extension */
>>   #define X86_FEATURE_PTSC	( 6*32+27) /* performance time-stamp counter */
>> -#define X86_FEATURE_PERFCTR_L2	( 6*32+28) /* L2 performance counter extensions */
>> +#define X86_FEATURE_PERFCTR_LLC	( 6*32+28) /* Last Level Cache performance counter extensions */
> Bah, the Zen PPR calls this PerfCtrExtL3 now. And F16h BKDG calls it
> PerfCtrExtL2I.
>
> Can this be fixed to be PerfCtrExtLLC in the docs so that there is no
> more confusion?

The PerfCtrExtL3 will be changed to PerfCtrExtLLC in the next PPR update.