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Date: Fri, 7 Jul 2017 07:03:01 +0000
From: Andy Duan <fugang.duan@....com>
To: Richard Leitner <richard.leitner@...data.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"dev@...l1n.net" <dev@...l1n.net>, Andrew Lunn <andrew@...n.ch>
Subject: RE: [PATCH 2/2] net: ethernet: fsl: add phy reset after clk enable
option
From: Richard Leitner <richard.leitner@...data.com> Sent: Friday, July 07, 2017 1:51 PM
>> Since it is common issue so long as using the PHY, can you move it into smsc
>phy driver like in .smsc_phy_reset() function ?
>> And get the reset pin from phy dts node.
>
>Some more points that come into my mind:
> - The smsc_phy_reset function is registered as "soft_reset". Would it be OK to
>use nRST in it?
It is not reasonable.
> - Would it be OK to call the phy_init_hw function from within the
>smsc_phy_reset?
No, phy_init_hw() already call .drv->soft_reset().
> - IMHO I'd have to move the reset gpio binding inside the phy node then. Isn't
>that a pretty big change doing that for all PHYs/FECs? Would it be "worth" it?
>
To make the change to be common, there have big change for phy driver.
Maybe somebody can give one good suggestion/solution for it.
Andy
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