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Message-ID: <20170708123018.qiwmyf3x43i4pgsg@gmail.com>
Date: Sat, 8 Jul 2017 14:30:19 +0200
From: Ingo Molnar <mingo@...nel.org>
To: "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
Cc: Manfred Spraul <manfred@...orfullife.com>,
Peter Zijlstra <peterz@...radead.org>,
David Laight <David.Laight@...LAB.COM>,
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Subject: Re: [PATCH v2 0/9] Remove spin_unlock_wait()
* Paul E. McKenney <paulmck@...ux.vnet.ibm.com> wrote:
> On Sat, Jul 08, 2017 at 10:35:43AM +0200, Ingo Molnar wrote:
> >
> > * Manfred Spraul <manfred@...orfullife.com> wrote:
> >
> > > Hi Ingo,
> > >
> > > On 07/07/2017 10:31 AM, Ingo Molnar wrote:
> > > >
> > > > There's another, probably just as significant advantage: queued_spin_unlock_wait()
> > > > is 'read-only', while spin_lock()+spin_unlock() dirties the lock cache line. On
> > > > any bigger system this should make a very measurable difference - if
> > > > spin_unlock_wait() is ever used in a performance critical code path.
> > > At least for ipc/sem:
> > > Dirtying the cacheline (in the slow path) allows to remove a smp_mb() in the
> > > hot path.
> > > So for sem_lock(), I either need a primitive that dirties the cacheline or
> > > sem_lock() must continue to use spin_lock()/spin_unlock().
> >
> > Technically you could use spin_trylock()+spin_unlock() and avoid the lock acquire
> > spinning on spin_unlock() and get very close to the slow path performance of a
> > pure cacheline-dirtying behavior.
> >
> > But adding something like spin_barrier(), which purely dirties the lock cacheline,
> > would be even faster, right?
>
> Interestingly enough, the arm64 and powerpc implementations of
> spin_unlock_wait() were very close to what it sounds like you are
> describing.
So could we perhaps solve all our problems by defining the generic version thusly:
void spin_unlock_wait(spinlock_t *lock)
{
if (spin_trylock(lock))
spin_unlock(lock);
}
... and perhaps rename it to spin_barrier() [or whatever proper name there would
be]?
Architectures can still optimize it, to remove the small window where the lock is
held locally - as long as the ordering is at least as strong as the generic
version.
This would have various advantages:
- semantics are well-defined
- the generic implementation is already pretty well optimized (no spinning)
- it would make it usable for the IPC performance optimization
- architectures could still optimize it to eliminate the window where the lock is
held locally - if there's such instructions available.
Was this proposed before, or am I missing something?
Thanks,
Ingo
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