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Message-ID: <7cd8c234-f048-fdc7-6e66-277de550265a@gmail.com>
Date: Mon, 10 Jul 2017 08:54:21 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Doug Berger <opendmb@...il.com>,
Thomas Gleixner <tglx@...utronix.de>
Cc: Kevin Cernekee <cernekee@...il.com>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Brian Norris <computersforpeace@...il.com>,
Gregory Fong <gregory.0xf0@...il.com>,
"maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE"
<bcm-kernel-feedback-list@...adcom.com>,
"open list:BROADCOM BMIPS MIPS ARCHITECTURE"
<linux-mips@...ux-mips.org>,
"open list:IRQCHIP DRIVERS" <linux-kernel@...r.kernel.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 5/6] irqchip: brcmstb-l2: Abstract register accesses
On 07/07/2017 12:20 PM, Doug Berger wrote:
> Added register block offsets to the brcmstb_l2_intc_data structure
> for the status and mask registers to support reading the active
> interupts in an abstracted way. It seems like an irq_chip method
> should have been provided for this, but it's not there yet.
>
> Abstracted the implementation of the handler, suspend, and resume
> functions to not use any hard coded register offsets.
>
> Signed-off-by: Doug Berger <opendmb@...il.com>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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