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Message-ID: <67be791f-e0cf-8284-9229-17174dc741ef@codeaurora.org>
Date:   Fri, 14 Jul 2017 09:54:45 -0400
From:   Sinan Kaya <okaya@...eaurora.org>
To:     Ding Tianhong <dingtianhong@...wei.com>, leedom@...lsio.com,
        ashok.raj@...el.com, bhelgaas@...gle.com, helgaas@...nel.org,
        werner@...lsio.com, ganeshgr@...lsio.com, asit.k.mallick@...el.com,
        patrick.j.cramer@...el.com, Suravee.Suthikulpanit@....com,
        Bob.Shaw@....com, l.stach@...gutronix.de, amira@...lanox.com,
        gabriele.paoloni@...wei.com, David.Laight@...lab.com,
        jeffrey.t.kirsher@...el.com, catalin.marinas@....com,
        will.deacon@....com, mark.rutland@....com, robin.murphy@....com,
        davem@...emloft.net, alexander.duyck@...il.com,
        linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        linuxarm@...wei.com
Subject: Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported

On 7/13/2017 9:26 PM, Ding Tianhong wrote:
> There is no code to enable the PCIe Relaxed Ordering bit in the configuration space,
> it is only be enable by default according to the PCIe Standard Specification, what we
> do is to distinguish the RC problematic platform and clear the Relaxed Ordering bit
> to tell the PCIe EP don't send any TLPs with Relaxed Ordering Attributes to the Root
> Complex.

Maybe, you should change the patch commit as 
"Disable PCIe Relaxed Ordering if not supported"...

-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

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