linux-kernel - Re: [PATCH v2 0/7] ARM: Broadcom Brahma-B15 readahead cache support

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Message-ID: <23e2f72f-bc22-2084-660f-bc793e68c174@gmail.com>
Date:   Fri, 14 Jul 2017 15:11:11 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        linux-arm-kernel@...ts.infradead.org
Cc:     Russell King <linux@...linux.org.uk>,
        Brian Norris <computersforpeace@...il.com>,
        Gregory Fong <gregory.0xf0@...il.com>,
        "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" 
        <bcm-kernel-feedback-list@...adcom.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "David S. Miller" <davem@...emloft.net>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        Vladimir Murzin <vladimir.murzin@....com>,
        Jonathan Austin <jonathan.austin@....com>,
        Kees Cook <keescook@...omium.org>,
        Laura Abbott <labbott@...hat.com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Mark Rutland <mark.rutland@....com>,
        Pawel Moll <pawel.moll@....com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Douglas Anderson <dianders@...omium.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Christoffer Dall <cdall@...aro.org>,
        Doug Anderson <armlinux@...isordat.com>,
        Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Anna-Maria Gleixner <anna-maria@...utronix.de>,
        Ingo Molnar <mingo@...nel.org>,
        Richard Cochran <rcochran@...utronix.de>,
        open list <linux-kernel@...r.kernel.org>, opendmb@...il.com
Subject: Re: [PATCH v2 0/7] ARM: Broadcom Brahma-B15 readahead cache support

On 06/23/2017 10:52 AM, Florian Fainelli wrote:
> Hi all,
> 
> This patch series adds support for the Broadcom Brahma-B15 readahead cache.
> I submitted that patch series a couple of years ago, and then slept on it so
> here is another stab at it.
> 
> Note that we did not implement this cache as a version of an outer cache
> for several reasons:
> 
> - we initially thought we needed to intercept flush_icache_all and
>   flush_kern_cache_louis but upon further inspection we convinced ourselves
>   this is no longer needed, still, flush_cache_all() needs special handling
>   here and needs to be wrapped around
> 
> - the outer cache does not allow differentiating a DMA transfer direction
>   this is a readahead cache, so it does not participate in writes, flushing
>   it during reads *and* writes kills the performance completely
> 
> - finally, most operations that outer_cache cares about are on MVA, which
>   is transparent to the readahead cache here
> 
> Changes in v2:
> 
> - clarify that the read-ahead caches does invalidates on writes (IOW) based
>   on Russell's feedback

Any comments on this? Thank you.

> 
> Florian Fainelli (7):
>   ARM: v7: allow setting different cache functions
>   ARM: Add Broadcom Brahma-B15 readahead cache support
>   ARM: Hook B15 readahead cache functions based on processor
>   ARM: B15: Add CPU hotplug awareness
>   ARM: B15: Add suspend/resume hooks
>   ARM: B15: Register reboot notifier for KEXEC
>   MAINTAINERS: Update brcmstb entries to cover B15 code
> 
>  MAINTAINERS                                   |   2 +
>  arch/arm/include/asm/glue-cache.h             |   4 +
>  arch/arm/include/asm/hardware/cache-b15-rac.h |  10 +
>  arch/arm/mm/Kconfig                           |   8 +
>  arch/arm/mm/Makefile                          |   1 +
>  arch/arm/mm/cache-b15-rac.c                   | 360 ++++++++++++++++++++++++++
>  arch/arm/mm/cache-v7.S                        |  21 ++
>  arch/arm/mm/proc-v7.S                         |   6 +-
>  include/linux/cpuhotplug.h                    |   2 +
>  9 files changed, 411 insertions(+), 3 deletions(-)
>  create mode 100644 arch/arm/include/asm/hardware/cache-b15-rac.h
>  create mode 100644 arch/arm/mm/cache-b15-rac.c
> 


-- 
Florian