linux-kernel - Re: [PATCH 01/14] qcom: mtd: nand: Add driver data for QPIC DMA

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 17 Jul 2017 09:22:34 +0200
From:   Boris Brezillon <boris.brezillon@...e-electrons.com>
To:     Abhishek Sahu <absahu@...eaurora.org>
Cc:     Archit Taneja <architt@...eaurora.org>, dwmw2@...radead.org,
        computersforpeace@...il.com, marek.vasut@...il.com, richard@....at,
        cyrille.pitchen@...ev4u.fr, robh+dt@...nel.org,
        mark.rutland@....com, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org, andy.gross@...aro.org,
        sricharan@...eaurora.org
Subject: Re: [PATCH 01/14] qcom: mtd: nand: Add driver data for QPIC DMA

On Mon, 17 Jul 2017 11:41:01 +0530
Abhishek Sahu <absahu@...eaurora.org> wrote:

> >> > +
> >> > +nand@...0000 {  
> > 
> > nand-controller@...x {
> > 
> > BTW, glad to see another driver moving to the new DT representation 
> > :-).
> >   
> >> > +	compatible = "qcom,qpic-nandc-v1.4.0";
> >> > +	reg = <0x79b0000 0x1000>;
> >> > +
> >> > +	clocks = <&gcc GCC_QPIC_CLK>,
> >> > +		<&gcc GCC_QPIC_AHB_CLK>;
> >> > +	clock-names = "core", "aon";
> >> > +
> >> > +	#address-cells = <1>;
> >> > +	#size-cells = <0>;
> >> > +
> >> > +	nandcs@0 {  
> > 
> > 	nand@0 {
> >   
> >> > +		compatible = "qcom,nandcs";  
> > 
> > Why do you need a compatible here?  
> It is the part of original driver. We can connect multiple
> NAND devices in the same bus and qcom,nandcs is being used
> for each connected NAND device. Each NAND device can use
> different  chip select, ecc strength etc which we can specify
> under this sub node.


Still don't understand why you need a compatible? Is this a memory bus
where you can connect other kind of memories (parallel NORs,
SRAMs, ...)?

If that's not the case, then considering all subnodes of the
nand-controller node containing a reg property as NAND devices is fine,
you don't need this compatible = "nand,cs" (see sunxi-nand bindings
[1]).

If the bus is generic and can be attached non-NAND devices, I'd
recommend looking at atmel's binding [2], because you're likely to
have one instance of the NAND controller logic for all NAND devices
connected on this bus.
And more importantly, if the bus a generic, the node should not be
named nand or nand-controller, and the compatible should not contain
'nandc' in it.

[1]http://elixir.free-electrons.com/linux/latest/source/Documentation/devicetree/bindings/mtd/sunxi-nand.txt#L34
[2]http://elixir.free-electrons.com/linux/latest/source/Documentation/devicetree/bindings/mtd/atmel-nand.txt#L70