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Message-Id: <1500279271-15249-4-git-send-email-wxt@rock-chips.com>
Date: Mon, 17 Jul 2017 16:14:29 +0800
From: Caesar Wang <wxt@...k-chips.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: linux-rockchip@...ts.infradead.org, rocky.hao@...k-chips.com,
Caesar Wang <wxt@...k-chips.com>,
Douglas Anderson <dianders@...omium.org>,
William wu <wulf@...k-chips.com>,
Elaine Zhang <zhangqing@...k-chips.com>,
Kever Yang <kever.yang@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
linux-kernel@...r.kernel.org, Shawn Lin <shawn.lin@...k-chips.com>,
devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
Will Deacon <will.deacon@....com>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Roger Chen <roger.chen@...k-chips.com>
Subject: [PATCH v2 3/5] arm64: dts: rockchip: add ARM Mali GPU node for RK3399 SoCs
Add Mali GPU device tree node for the RK3399 SoCs, with devfreq
opp table.
RK3399 and RK3399-OP1 SoCs have a different recommendation table with
gpu opp. Also, the ARM's mali driver found on
https://developer.arm.com/products/software/mali-drivers/midgard-kernel.
Signed-off-by: Caesar Wang <wxt@...k-chips.com>
---
Changes in v2:
As Heiko comments on https://patchwork.kernel.org/patch/9835939/
- interrupt-name use the lower case.
- use the correct compatible "arm,mali-t860"
- remove the clock name, since the mali only have one input clock.
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi | 33 ++++++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 33 ++++++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 +++++++++
3 files changed, 78 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
index be7fe63..d8a120f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
@@ -118,6 +118,35 @@
opp-microvolt = <1250000>;
};
};
+
+ gpu_opp_table: opp-table2 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <800000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <297000000>;
+ opp-microvolt = <800000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <850000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <925000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1075000>;
+ };
+ };
};
&cpu_l0 {
@@ -143,3 +172,7 @@
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
+
+&gpu {
+ operating-points-v2 = <&gpu_opp_table>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
index c83460d..81617bc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
@@ -110,6 +110,35 @@
opp-microvolt = <1200000>;
};
};
+
+ gpu_opp_table: opp-table2 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <800000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <297000000>;
+ opp-microvolt = <800000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <825000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <875000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <925000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1100000>;
+ };
+ };
};
&cpu_l0 {
@@ -135,3 +164,7 @@
&cpu_b1 {
operating-points-v2 = <&cluster1_opp>;
};
+
+&gpu {
+ operating-points-v2 = <&gpu_opp_table>;
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 1cbd7a2..77d67cb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1443,6 +1443,18 @@
status = "disabled";
};
+ gpu: gpu@...a0000 {
+ compatible = "arm,rk3399-mali", "arm,mali-t860";
+ reg = <0x0 0xff9a0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "gpu", "job", "mmu";
+ clocks = <&cru ACLK_GPU>;
+ power-domains = <&power RK3399_PD_GPU>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3399-pinctrl";
rockchip,grf = <&grf>;
--
2.7.4
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