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Message-Id: <1500293043-1887-1-git-send-email-varada@codeaurora.org>
Date: Mon, 17 Jul 2017 17:33:56 +0530
From: Varadarajan Narayanan <varada@...eaurora.org>
To: bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
svarbanov@...sol.com, kishon@...com, sboyd@...eaurora.org,
vivek.gautam@...eaurora.org, fengguang.wu@...el.com,
weiyongjun1@...wei.com, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Cc: Varadarajan Narayanan <varada@...eaurora.org>
Subject: [PATCH 0/7] Add support for IPQ8074 PCIe phy and controller
Add definitions required to enable QMP phy support for IPQ8074.
Add support for the IPQ8074 PCIe controller. IPQ8074 supports
Gen 1/2, one lane, two PCIe root complex with support for MSI and
legacy interrupts, and it conforms to PCI Express Base 2.1
specification.
Varadarajan Narayanan (7):
dt-bindings: phy: qmp: Add output-clock-names
dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074
phy: qcom-qmp: Fix phy pipe clock name
phy: qcom-qmp: Handle unavailable registers
phy: qcom-qmp: Add support for IPQ8074
dt-bindings: pci: qcom: Add support for IPQ8074
PCI: dwc: qcom: Add support for IPQ8074 PCIe controller
.../devicetree/bindings/pci/qcom,pcie.txt | 67 ++++++
.../devicetree/bindings/phy/qcom-qmp-phy.txt | 31 +++
drivers/pci/dwc/pcie-qcom.c | 259 +++++++++++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp.c | 186 +++++++++++++--
4 files changed, 522 insertions(+), 21 deletions(-)
--
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