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Message-ID: <75543243-33fb-d972-f6d9-0c770969e5d1@st.com>
Date: Mon, 17 Jul 2017 13:42:11 -0700
From: Vikas Manocha <vikas.manocha@...com>
To: Alexandre Torgue <alexandre.torgue@...com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Arnd Bergmann <arnd@...db.de>,
Russell King <linux@...linux.org.uk>
CC: <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RESEND RFC PATCH] ARM: dts: stm32: change pinctrl bindings
definition
Hi Alex,
On 07/17/2017 09:23 AM, Alexandre Torgue wrote:
> From: Alexandre TORGUE <alexandre.torgue@...com>
>
> Initially each pin was declared in "include/dt-bindings/stm32f429-pinfunc.h"
> and each definition contained SOC names (ex: STM32F429_PA9_FUNC_USART1_TX).
> Since this approach was approved, the number of supported MCU has
> increased (STM32F429/STM32F469/STM32f746/STM32H743). To avoid to add a new
> file in "include/dt-bindings" each time a new STM32 SOC arrives I propose
> a new approach which consist to use a macro to define pin muxing in device
> tree. All STM32 will use the common macro to define pinmux. Furthermore, it
> will make easy maintenance and integration of new SOC.
>
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@...com>
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
> index a8113dc..4bb2b4f 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -47,7 +47,7 @@
>
> #include "skeleton.dtsi"
> #include "armv7-m.dtsi"
> -#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
> +#include <dt-bindings/pinctrl/stm32-pinfunc.h>
> #include <dt-bindings/clock/stm32fx-clock.h>
> #include <dt-bindings/mfd/stm32f4-rcc.h>
>
> @@ -687,35 +687,35 @@
>
> usart1_pins_a: usart1@0 {
> pins1 {
> - pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
> + pinmux = <STM32_PINMUX(PA(9), AF7)>; /* USART1_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
> + pinmux = <STM32_PINMUX(PA(10), AF7)>; /* USART1_RX */
> bias-disable;
> };
> };
>
> usart3_pins_a: usart3@0 {
> pins1 {
> - pinmux = <STM32F429_PB10_FUNC_USART3_TX>;
> + pinmux = <STM32_PINMUX(PB(10), AF7)>; /* USART3_TX */
> bias-disable;
> drive-push-pull;
> slew-rate = <0>;
> };
> pins2 {
> - pinmux = <STM32F429_PB11_FUNC_USART3_RX>;
> + pinmux = <STM32_PINMUX(PB(11), AF7)>; /* USART3_RX */
> bias-disable;
> };
> };
>
> usbotg_fs_pins_a: usbotg_fs@0 {
> pins {
> - pinmux = <STM32F429_PA10_FUNC_OTG_FS_ID>,
> - <STM32F429_PA11_FUNC_OTG_FS_DM>,
> - <STM32F429_PA12_FUNC_OTG_FS_DP>;
> + pinmux = <STM32_PINMUX(PA(10), AF10)>, /* OTG_FS_ID */
> + <STM32_PINMUX(PA(11), AF10)>, /* OTG_FS_DM */
> + <STM32_PINMUX(PA(12), AF10)>; /* OTG_FS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -724,9 +724,9 @@
>
> usbotg_fs_pins_b: usbotg_fs@1 {
> pins {
> - pinmux = <STM32F429_PB12_FUNC_OTG_HS_ID>,
> - <STM32F429_PB14_FUNC_OTG_HS_DM>,
> - <STM32F429_PB15_FUNC_OTG_HS_DP>;
> + pinmux = <STM32_PINMUX(PB(12), AF12)>, /* OTG_HS_ID */
> + <STM32_PINMUX(PB(14), AF12)>, /* OTG_HS_DM */
> + <STM32_PINMUX(PB(15), AF12)>; /* OTG_HS_DP */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -735,18 +735,18 @@
>
> usbotg_hs_pins_a: usbotg_hs@0 {
> pins {
> - pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
> - <STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>,
> - <STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>,
> - <STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>,
> - <STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>,
> - <STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>,
> - <STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>,
> - <STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>,
> - <STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>,
> - <STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>,
> - <STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>,
> - <STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>;
> + pinmux = <STM32_PINMUX(PH(4), AF10)>, /* OTG_HS_ULPI_NXT*/
> + <STM32_PINMUX(PI(11), AF10)>, /* OTG_HS_ULPI_DIR */
> + <STM32_PINMUX(PC(0), AF10)>, /* OTG_HS_ULPI_STP */
> + <STM32_PINMUX(PA(5), AF10)>, /* OTG_HS_ULPI_CK */
> + <STM32_PINMUX(PA(3), AF10)>, /* OTG_HS_ULPI_D0 */
> + <STM32_PINMUX(PB(0), AF10)>, /* OTG_HS_ULPI_D1 */
> + <STM32_PINMUX(PB(1), AF10)>, /* OTG_HS_ULPI_D2 */
> + <STM32_PINMUX(PB(10), AF10)>, /* OTG_HS_ULPI_D3 */
> + <STM32_PINMUX(PB(11), AF10)>, /* OTG_HS_ULPI_D4 */
> + <STM32_PINMUX(PB(12), AF10)>, /* OTG_HS_ULPI_D5 */
> + <STM32_PINMUX(PB(13), AF10)>, /* OTG_HS_ULPI_D6 */
> + <STM32_PINMUX(PB(5), AF10)>; /* OTG_HS_ULPI_D7 */
> bias-disable;
> drive-push-pull;
> slew-rate = <2>;
> @@ -755,49 +755,49 @@
>
> ethernet_mii: mii@0 {
> pins {
> - pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
> - <STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
> - <STM32F429_PC2_FUNC_ETH_MII_TXD2>,
> - <STM32F429_PB8_FUNC_ETH_MII_TXD3>,
> - <STM32F429_PC3_FUNC_ETH_MII_TX_CLK>,
> - <STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN>,
> - <STM32F429_PA2_FUNC_ETH_MDIO>,
> - <STM32F429_PC1_FUNC_ETH_MDC>,
> - <STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK>,
> - <STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV>,
> - <STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0>,
> - <STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1>,
> - <STM32F429_PH6_FUNC_ETH_MII_RXD2>,
> - <STM32F429_PH7_FUNC_ETH_MII_RXD3>;
> + pinmux = <STM32_PINMUX(PG(13), AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
> + <STM32_PINMUX(PG(14), AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
> + <STM32_PINMUX(PC(2), AF11)>, /* ETH_MII_TXD2 */
> + <STM32_PINMUX(PB(8), AF11)>, /* ETH_MII_TXD3 */
> + <STM32_PINMUX(PC(3), AF11)>, /* ETH_MII_TX_CLK */
> + <STM32_PINMUX(PG(11),AF11)>, /* ETH_MII_TX_EN_ETH_RMII_TX_EN */
> + <STM32_PINMUX(PA(2), AF11)>, /* ETH_MDIO */
> + <STM32_PINMUX(PC(1), AF11)>, /* ETH_MDC */
> + <STM32_PINMUX(PA(1), AF11)>, /* ETH_MII_RX_CLK_ETH_RMII_REF_CLK */
> + <STM32_PINMUX(PA(7), AF11)>, /* ETH_MII_RX_DV_ETH_RMII_CRS_DV */
> + <STM32_PINMUX(PC(4), AF11)>, /* ETH_MII_RXD0_ETH_RMII_RXD0 */
> + <STM32_PINMUX(PC(5), AF11)>, /* ETH_MII_RXD1_ETH_RMII_RXD1 */
> + <STM32_PINMUX(PH(6), AF11)>, /* ETH_MII_RXD2 */
> + <STM32_PINMUX(PH(7), AF11)>; /* ETH_MII_RXD3 */
> slew-rate = <2>;
> };
> };
>
> adc3_in8_pin: adc@200 {
> pins {
> - pinmux = <STM32F429_PF10_FUNC_ANALOG>;
> + pinmux = <STM32_PINMUX(PF(10), ANALOG)>;
> };
> };
>
> pwm1_pins: pwm@1 {
> pins {
> - pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,
> - <STM32F429_PB13_FUNC_TIM1_CH1N>,
> - <STM32F429_PB12_FUNC_TIM1_BKIN>;
> + pinmux = <STM32_PINMUX(PA(8), AF1)>, /* TIM1_CH1 */
> + <STM32_PINMUX(PB(13), AF1)>, /* TIM1_CH1N */
> + <STM32_PINMUX(PB(12), AF1)>; /* TIM1_BKIN */
> };
> };
>
> pwm3_pins: pwm@3 {
> pins {
> - pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,
> - <STM32F429_PB5_FUNC_TIM3_CH2>;
> + pinmux = <STM32_PINMUX(PB(4), AF2)>, /* TIM3_CH1 */
> + <STM32_PINMUX(PB(5), AF2)>; /* TIM3_CH2 */
> };
> };
>
> i2c1_pins: i2c1@0 {
> pins {
> - pinmux = <STM32F429_PB9_FUNC_I2C1_SDA>,
> - <STM32F429_PB6_FUNC_I2C1_SCL>;
> + pinmux = <STM32_PINMUX(PB(9), AF4)>, /* I2C1_SDA */
> + <STM32_PINMUX(PB(6), AF4)>; /* I2C1_SCL */
> bias-disable;
> drive-open-drain;
> slew-rate = <3>;
> @@ -806,55 +806,55 @@
>
> ltdc_pins: ltdc@0 {
> pins {
> - pinmux = <STM32F429_PI12_FUNC_LCD_HSYNC>,
> - <STM32F429_PI13_FUNC_LCD_VSYNC>,
> - <STM32F429_PI14_FUNC_LCD_CLK>,
> - <STM32F429_PI15_FUNC_LCD_R0>,
> - <STM32F429_PJ0_FUNC_LCD_R1>,
> - <STM32F429_PJ1_FUNC_LCD_R2>,
> - <STM32F429_PJ2_FUNC_LCD_R3>,
> - <STM32F429_PJ3_FUNC_LCD_R4>,
> - <STM32F429_PJ4_FUNC_LCD_R5>,
> - <STM32F429_PJ5_FUNC_LCD_R6>,
> - <STM32F429_PJ6_FUNC_LCD_R7>,
> - <STM32F429_PJ7_FUNC_LCD_G0>,
> - <STM32F429_PJ8_FUNC_LCD_G1>,
> - <STM32F429_PJ9_FUNC_LCD_G2>,
> - <STM32F429_PJ10_FUNC_LCD_G3>,
> - <STM32F429_PJ11_FUNC_LCD_G4>,
> - <STM32F429_PJ12_FUNC_LCD_B0>,
> - <STM32F429_PJ13_FUNC_LCD_B1>,
> - <STM32F429_PJ14_FUNC_LCD_B2>,
> - <STM32F429_PJ15_FUNC_LCD_B3>,
> - <STM32F429_PK0_FUNC_LCD_G5>,
> - <STM32F429_PK1_FUNC_LCD_G6>,
> - <STM32F429_PK2_FUNC_LCD_G7>,
> - <STM32F429_PK3_FUNC_LCD_B4>,
> - <STM32F429_PK4_FUNC_LCD_B5>,
> - <STM32F429_PK5_FUNC_LCD_B6>,
> - <STM32F429_PK6_FUNC_LCD_B7>,
> - <STM32F429_PK7_FUNC_LCD_DE>;
> + pinmux = <STM32_PINMUX(PI(12), AF14)>, /* LCD_HSYNC */
> + <STM32_PINMUX(PI(13), AF14)>, /* LCD_VSYNC */
> + <STM32_PINMUX(PI(14), AF14)>, /* LCD_CLK */
> + <STM32_PINMUX(PI(15), AF14)>, /* LCD_R0 */
> + <STM32_PINMUX(PJ(0), AF14)>, /* LCD_R1 */
> + <STM32_PINMUX(PJ(1), AF14)>, /* LCD_R2 */
> + <STM32_PINMUX(PJ(2), AF14)>, /* LCD_R3 */
> + <STM32_PINMUX(PJ(3), AF14)>, /* LCD_R4 */
> + <STM32_PINMUX(PJ(4), AF14)>, /* LCD_R5 */
> + <STM32_PINMUX(PJ(5), AF14)>, /* LCD_R6*/
> + <STM32_PINMUX(PJ(6), AF14)>, /* LCD_R7 */
> + <STM32_PINMUX(PJ(7), AF14)>, /* LCD_G0 */
> + <STM32_PINMUX(PJ(8), AF14)>, /* LCD_G1 */
> + <STM32_PINMUX(PJ(9), AF14)>, /* LCD_G2 */
> + <STM32_PINMUX(PJ(10), AF14)>, /* LCD_G3 */
> + <STM32_PINMUX(PJ(11), AF14)>, /* LCD_G4 */
> + <STM32_PINMUX(PJ(12), AF14)>, /* LCD_B0 */
> + <STM32_PINMUX(PJ(13), AF14)>, /* LCD_B1 */
> + <STM32_PINMUX(PJ(14), AF14)>, /* LCD_B2 */
> + <STM32_PINMUX(PJ(15), AF14)>, /* LCD_B3*/
> + <STM32_PINMUX(PK(0), AF14)>, /* LCD_G5 */
> + <STM32_PINMUX(PK(1), AF14)>, /* LCD_G6 */
> + <STM32_PINMUX(PK(2), AF14)>, /* LCD_G7 */
> + <STM32_PINMUX(PK(3), AF14)>, /* LCD_B4 */
> + <STM32_PINMUX(PK(4), AF14)>, /* LCD_B5 */
> + <STM32_PINMUX(PK(5), AF14)>, /* LCD_B6 */
> + <STM32_PINMUX(PK(6), AF14)>, /* LCD_B7 */
> + <STM32_PINMUX(PK(7), AF14)>; /* LCD_DE */
> slew-rate = <2>;
> };
> };
>
> dcmi_pins: dcmi@0 {
> pins {
> - pinmux = <STM32F429_PA4_FUNC_DCMI_HSYNC>,
> - <STM32F429_PB7_FUNC_DCMI_VSYNC>,
> - <STM32F429_PA6_FUNC_DCMI_PIXCLK>,
> - <STM32F429_PC6_FUNC_DCMI_D0>,
> - <STM32F429_PC7_FUNC_DCMI_D1>,
> - <STM32F429_PC8_FUNC_DCMI_D2>,
> - <STM32F429_PC9_FUNC_DCMI_D3>,
> - <STM32F429_PC11_FUNC_DCMI_D4>,
> - <STM32F429_PD3_FUNC_DCMI_D5>,
> - <STM32F429_PB8_FUNC_DCMI_D6>,
> - <STM32F429_PE6_FUNC_DCMI_D7>,
> - <STM32F429_PC10_FUNC_DCMI_D8>,
> - <STM32F429_PC12_FUNC_DCMI_D9>,
> - <STM32F429_PD6_FUNC_DCMI_D10>,
> - <STM32F429_PD2_FUNC_DCMI_D11>;
> + pinmux = <STM32_PINMUX(PA(4), AF13)>, /* DCMI_HSYNC */
> + <STM32_PINMUX(PB(7), AF13)>, /* DCMI_VSYNC */
> + <STM32_PINMUX(PA(6), AF13)>, /* DCMI_PIXCLK */
> + <STM32_PINMUX(PC(6), AF13)>, /* DCMI_D0 */
> + <STM32_PINMUX(PC(7), AF13)>, /* DCMI_D1 */
> + <STM32_PINMUX(PC(8), AF13)>, /* DCMI_D2 */
> + <STM32_PINMUX(PC(9), AF13)>, /* DCMI_D3 */
> + <STM32_PINMUX(PC(11), AF13)>, /*DCMI_D4 */
> + <STM32_PINMUX(PD(3), AF13)>, /* DCMI_D5 */
> + <STM32_PINMUX(PB(8), AF13)>, /* DCMI_D6 */
> + <STM32_PINMUX(PE(6), AF13)>, /* DCMI_D7 */
> + <STM32_PINMUX(PC(10), AF13)>, /* DCMI_D8 */
> + <STM32_PINMUX(PC(12), AF13)>, /* DCMI_D9 */
> + <STM32_PINMUX(PD(6), AF13)>, /* DCMI_D10 */
> + <STM32_PINMUX(PD(2), AF13)>; /* DCMI_D11 */
> bias-disable;
> drive-push-pull;
> slew-rate = <3>;
> diff --git a/include/dt-bindings/pinctrl/stm32-pinfunc.h b/include/dt-bindings/pinctrl/stm32-pinfunc.h
> new file mode 100644
> index 0000000..cb7abf3
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/stm32-pinfunc.h
> @@ -0,0 +1,61 @@
> +#ifndef _DT_BINDINGS_STM32_PINFUNC_H
> +#define _DT_BINDINGS_STM32_PINFUNC_H
> +
> +#define STM32_PINMUX(pin, mode) (((pin) << 8) | (mode))
> +
> +/* define PIN modes */
> +#define GPIO 0x0
> +#define AF0 0x1
> +#define AF1 0x2
> +#define AF2 0x3
> +#define AF3 0x4
> +#define AF4 0x5
> +#define AF5 0x6
> +#define AF6 0x7
> +#define AF7 0x8
> +#define AF8 0x9
> +#define AF9 0xa
> +#define AF10 0xb
> +#define AF11 0xc
> +#define AF12 0xd
> +#define AF13 0xe
> +#define AF14 0xf
> +#define AF15 0x10
> +#define ANALOG 0x11
> +
> +/* define Pins number*/
> +#define PA_BASE 0
> +#define PA(x) ((x) + PA_BASE)
> +
> +#define PB_BASE 0x10
> +#define PB(x) ((x) + PB_BASE)
> +
> +#define PC_BASE 0x20
> +#define PC(x) ((x) + PC_BASE)
> +
> +#define PD_BASE 0x30
> +#define PD(x) ((x) + PD_BASE)
> +
> +#define PE_BASE 0x40
> +#define PE(x) ((x) + PE_BASE)
> +
> +#define PF_BASE 0x50
> +#define PF(x) ((x) + PF_BASE)
> +
> +#define PG_BASE 0x60
> +#define PG(x) ((x) + PG_BASE)
> +
> +#define PH_BASE 0x70
> +#define PH(x) ((x) + PH_BASE)
> +
> +#define PI_BASE 0x80
> +#define PI(x) ((x) + PI_BASE)
> +
> +#define PJ_BASE 0x90
> +#define PJ(x) ((x) + PJ_BASE)
> +
> +#define PK_BASE 0xa0
> +#define PK(x) ((x) + PK_BASE)
These port macros can be reduced to one generic macro like (it will also avoid extending macros for future ports like port L, M etc):
#define PIN_NO(port_name, pin_number) ((port_name - 'A') * 0x10 + pin_number)
& modify pinmux to
pinmux = <STM32_PINMUX(PIN_NO('A',9), AF7)>; /* USART1_TX */
Also character constant 'A' above can be replace by macro like:
#define FIRST_PORT 'A'
Cheers,
Vikas
> +
> +#endif /* _DT_BINDINGS_STM32_PINFUNC_H */
> +
> diff --git a/include/dt-bindings/pinctrl/stm32f429-pinfunc.h b/include/dt-bindings/pinctrl/stm32f429-pinfunc.h
> deleted file mode 100644
> index 26f1879..0000000
> --- a/include/dt-bindings/pinctrl/stm32f429-pinfunc.h
> +++ /dev/null
> @@ -1,1239 +0,0 @@
> -#ifndef _DT_BINDINGS_STM32F429_PINFUNC_H
> -#define _DT_BINDINGS_STM32F429_PINFUNC_H
> -
> -#define STM32F429_PA0_FUNC_GPIO 0x0
> -#define STM32F429_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
> -#define STM32F429_PA0_FUNC_TIM5_CH1 0x3
> -#define STM32F429_PA0_FUNC_TIM8_ETR 0x4
> -#define STM32F429_PA0_FUNC_USART2_CTS 0x8
> -#define STM32F429_PA0_FUNC_UART4_TX 0x9
> -#define STM32F429_PA0_FUNC_ETH_MII_CRS 0xc
> -#define STM32F429_PA0_FUNC_EVENTOUT 0x10
> -#define STM32F429_PA0_FUNC_ANALOG 0x11
> -
> -#define STM32F429_PA1_FUNC_GPIO 0x100
> -#define STM32F429_PA1_FUNC_TIM2_CH2 0x102
> -#define STM32F429_PA1_FUNC_TIM5_CH2 0x103
> -#define STM32F429_PA1_FUNC_USART2_RTS 0x108
> -#define STM32F429_PA1_FUNC_UART4_RX 0x109
> -#define STM32F429_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c
> -#define STM32F429_PA1_FUNC_EVENTOUT 0x110
> -#define STM32F429_PA1_FUNC_ANALOG 0x111
> -
> -#define STM32F429_PA2_FUNC_GPIO 0x200
> -#define STM32F429_PA2_FUNC_TIM2_CH3 0x202
> -#define STM32F429_PA2_FUNC_TIM5_CH3 0x203
> -#define STM32F429_PA2_FUNC_TIM9_CH1 0x204
> -#define STM32F429_PA2_FUNC_USART2_TX 0x208
> -#define STM32F429_PA2_FUNC_ETH_MDIO 0x20c
> -#define STM32F429_PA2_FUNC_EVENTOUT 0x210
> -#define STM32F429_PA2_FUNC_ANALOG 0x211
> -
> -#define STM32F429_PA3_FUNC_GPIO 0x300
> -#define STM32F429_PA3_FUNC_TIM2_CH4 0x302
> -#define STM32F429_PA3_FUNC_TIM5_CH4 0x303
> -#define STM32F429_PA3_FUNC_TIM9_CH2 0x304
> -#define STM32F429_PA3_FUNC_USART2_RX 0x308
> -#define STM32F429_PA3_FUNC_OTG_HS_ULPI_D0 0x30b
> -#define STM32F429_PA3_FUNC_ETH_MII_COL 0x30c
> -#define STM32F429_PA3_FUNC_LCD_B5 0x30f
> -#define STM32F429_PA3_FUNC_EVENTOUT 0x310
> -#define STM32F429_PA3_FUNC_ANALOG 0x311
> -
> -#define STM32F429_PA4_FUNC_GPIO 0x400
> -#define STM32F429_PA4_FUNC_SPI1_NSS 0x406
> -#define STM32F429_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407
> -#define STM32F429_PA4_FUNC_USART2_CK 0x408
> -#define STM32F429_PA4_FUNC_OTG_HS_SOF 0x40d
> -#define STM32F429_PA4_FUNC_DCMI_HSYNC 0x40e
> -#define STM32F429_PA4_FUNC_LCD_VSYNC 0x40f
> -#define STM32F429_PA4_FUNC_EVENTOUT 0x410
> -#define STM32F429_PA4_FUNC_ANALOG 0x411
> -
> -#define STM32F429_PA5_FUNC_GPIO 0x500
> -#define STM32F429_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502
> -#define STM32F429_PA5_FUNC_TIM8_CH1N 0x504
> -#define STM32F429_PA5_FUNC_SPI1_SCK 0x506
> -#define STM32F429_PA5_FUNC_OTG_HS_ULPI_CK 0x50b
> -#define STM32F429_PA5_FUNC_EVENTOUT 0x510
> -#define STM32F429_PA5_FUNC_ANALOG 0x511
> -
> -#define STM32F429_PA6_FUNC_GPIO 0x600
> -#define STM32F429_PA6_FUNC_TIM1_BKIN 0x602
> -#define STM32F429_PA6_FUNC_TIM3_CH1 0x603
> -#define STM32F429_PA6_FUNC_TIM8_BKIN 0x604
> -#define STM32F429_PA6_FUNC_SPI1_MISO 0x606
> -#define STM32F429_PA6_FUNC_TIM13_CH1 0x60a
> -#define STM32F429_PA6_FUNC_DCMI_PIXCLK 0x60e
> -#define STM32F429_PA6_FUNC_LCD_G2 0x60f
> -#define STM32F429_PA6_FUNC_EVENTOUT 0x610
> -#define STM32F429_PA6_FUNC_ANALOG 0x611
> -
> -#define STM32F429_PA7_FUNC_GPIO 0x700
> -#define STM32F429_PA7_FUNC_TIM1_CH1N 0x702
> -#define STM32F429_PA7_FUNC_TIM3_CH2 0x703
> -#define STM32F429_PA7_FUNC_TIM8_CH1N 0x704
> -#define STM32F429_PA7_FUNC_SPI1_MOSI 0x706
> -#define STM32F429_PA7_FUNC_TIM14_CH1 0x70a
> -#define STM32F429_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c
> -#define STM32F429_PA7_FUNC_EVENTOUT 0x710
> -#define STM32F429_PA7_FUNC_ANALOG 0x711
> -
> -#define STM32F429_PA8_FUNC_GPIO 0x800
> -#define STM32F429_PA8_FUNC_MCO1 0x801
> -#define STM32F429_PA8_FUNC_TIM1_CH1 0x802
> -#define STM32F429_PA8_FUNC_I2C3_SCL 0x805
> -#define STM32F429_PA8_FUNC_USART1_CK 0x808
> -#define STM32F429_PA8_FUNC_OTG_FS_SOF 0x80b
> -#define STM32F429_PA8_FUNC_LCD_R6 0x80f
> -#define STM32F429_PA8_FUNC_EVENTOUT 0x810
> -#define STM32F429_PA8_FUNC_ANALOG 0x811
> -
> -#define STM32F429_PA9_FUNC_GPIO 0x900
> -#define STM32F429_PA9_FUNC_TIM1_CH2 0x902
> -#define STM32F429_PA9_FUNC_I2C3_SMBA 0x905
> -#define STM32F429_PA9_FUNC_USART1_TX 0x908
> -#define STM32F429_PA9_FUNC_DCMI_D0 0x90e
> -#define STM32F429_PA9_FUNC_EVENTOUT 0x910
> -#define STM32F429_PA9_FUNC_ANALOG 0x911
> -
> -#define STM32F429_PA10_FUNC_GPIO 0xa00
> -#define STM32F429_PA10_FUNC_TIM1_CH3 0xa02
> -#define STM32F429_PA10_FUNC_USART1_RX 0xa08
> -#define STM32F429_PA10_FUNC_OTG_FS_ID 0xa0b
> -#define STM32F429_PA10_FUNC_DCMI_D1 0xa0e
> -#define STM32F429_PA10_FUNC_EVENTOUT 0xa10
> -#define STM32F429_PA10_FUNC_ANALOG 0xa11
> -
> -#define STM32F429_PA11_FUNC_GPIO 0xb00
> -#define STM32F429_PA11_FUNC_TIM1_CH4 0xb02
> -#define STM32F429_PA11_FUNC_USART1_CTS 0xb08
> -#define STM32F429_PA11_FUNC_CAN1_RX 0xb0a
> -#define STM32F429_PA11_FUNC_OTG_FS_DM 0xb0b
> -#define STM32F429_PA11_FUNC_LCD_R4 0xb0f
> -#define STM32F429_PA11_FUNC_EVENTOUT 0xb10
> -#define STM32F429_PA11_FUNC_ANALOG 0xb11
> -
> -#define STM32F429_PA12_FUNC_GPIO 0xc00
> -#define STM32F429_PA12_FUNC_TIM1_ETR 0xc02
> -#define STM32F429_PA12_FUNC_USART1_RTS 0xc08
> -#define STM32F429_PA12_FUNC_CAN1_TX 0xc0a
> -#define STM32F429_PA12_FUNC_OTG_FS_DP 0xc0b
> -#define STM32F429_PA12_FUNC_LCD_R5 0xc0f
> -#define STM32F429_PA12_FUNC_EVENTOUT 0xc10
> -#define STM32F429_PA12_FUNC_ANALOG 0xc11
> -
> -#define STM32F429_PA13_FUNC_GPIO 0xd00
> -#define STM32F429_PA13_FUNC_JTMS_SWDIO 0xd01
> -#define STM32F429_PA13_FUNC_EVENTOUT 0xd10
> -#define STM32F429_PA13_FUNC_ANALOG 0xd11
> -
> -#define STM32F429_PA14_FUNC_GPIO 0xe00
> -#define STM32F429_PA14_FUNC_JTCK_SWCLK 0xe01
> -#define STM32F429_PA14_FUNC_EVENTOUT 0xe10
> -#define STM32F429_PA14_FUNC_ANALOG 0xe11
> -
> -#define STM32F429_PA15_FUNC_GPIO 0xf00
> -#define STM32F429_PA15_FUNC_JTDI 0xf01
> -#define STM32F429_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02
> -#define STM32F429_PA15_FUNC_SPI1_NSS 0xf06
> -#define STM32F429_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07
> -#define STM32F429_PA15_FUNC_EVENTOUT 0xf10
> -#define STM32F429_PA15_FUNC_ANALOG 0xf11
> -
> -
> -
> -#define STM32F429_PB0_FUNC_GPIO 0x1000
> -#define STM32F429_PB0_FUNC_TIM1_CH2N 0x1002
> -#define STM32F429_PB0_FUNC_TIM3_CH3 0x1003
> -#define STM32F429_PB0_FUNC_TIM8_CH2N 0x1004
> -#define STM32F429_PB0_FUNC_LCD_R3 0x100a
> -#define STM32F429_PB0_FUNC_OTG_HS_ULPI_D1 0x100b
> -#define STM32F429_PB0_FUNC_ETH_MII_RXD2 0x100c
> -#define STM32F429_PB0_FUNC_EVENTOUT 0x1010
> -#define STM32F429_PB0_FUNC_ANALOG 0x1011
> -
> -#define STM32F429_PB1_FUNC_GPIO 0x1100
> -#define STM32F429_PB1_FUNC_TIM1_CH3N 0x1102
> -#define STM32F429_PB1_FUNC_TIM3_CH4 0x1103
> -#define STM32F429_PB1_FUNC_TIM8_CH3N 0x1104
> -#define STM32F429_PB1_FUNC_LCD_R6 0x110a
> -#define STM32F429_PB1_FUNC_OTG_HS_ULPI_D2 0x110b
> -#define STM32F429_PB1_FUNC_ETH_MII_RXD3 0x110c
> -#define STM32F429_PB1_FUNC_EVENTOUT 0x1110
> -#define STM32F429_PB1_FUNC_ANALOG 0x1111
> -
> -#define STM32F429_PB2_FUNC_GPIO 0x1200
> -#define STM32F429_PB2_FUNC_EVENTOUT 0x1210
> -#define STM32F429_PB2_FUNC_ANALOG 0x1211
> -
> -#define STM32F429_PB3_FUNC_GPIO 0x1300
> -#define STM32F429_PB3_FUNC_JTDO_TRACESWO 0x1301
> -#define STM32F429_PB3_FUNC_TIM2_CH2 0x1302
> -#define STM32F429_PB3_FUNC_SPI1_SCK 0x1306
> -#define STM32F429_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307
> -#define STM32F429_PB3_FUNC_EVENTOUT 0x1310
> -#define STM32F429_PB3_FUNC_ANALOG 0x1311
> -
> -#define STM32F429_PB4_FUNC_GPIO 0x1400
> -#define STM32F429_PB4_FUNC_NJTRST 0x1401
> -#define STM32F429_PB4_FUNC_TIM3_CH1 0x1403
> -#define STM32F429_PB4_FUNC_SPI1_MISO 0x1406
> -#define STM32F429_PB4_FUNC_SPI3_MISO 0x1407
> -#define STM32F429_PB4_FUNC_I2S3EXT_SD 0x1408
> -#define STM32F429_PB4_FUNC_EVENTOUT 0x1410
> -#define STM32F429_PB4_FUNC_ANALOG 0x1411
> -
> -#define STM32F429_PB5_FUNC_GPIO 0x1500
> -#define STM32F429_PB5_FUNC_TIM3_CH2 0x1503
> -#define STM32F429_PB5_FUNC_I2C1_SMBA 0x1505
> -#define STM32F429_PB5_FUNC_SPI1_MOSI 0x1506
> -#define STM32F429_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507
> -#define STM32F429_PB5_FUNC_CAN2_RX 0x150a
> -#define STM32F429_PB5_FUNC_OTG_HS_ULPI_D7 0x150b
> -#define STM32F429_PB5_FUNC_ETH_PPS_OUT 0x150c
> -#define STM32F429_PB5_FUNC_FMC_SDCKE1 0x150d
> -#define STM32F429_PB5_FUNC_DCMI_D10 0x150e
> -#define STM32F429_PB5_FUNC_EVENTOUT 0x1510
> -#define STM32F429_PB5_FUNC_ANALOG 0x1511
> -
> -#define STM32F429_PB6_FUNC_GPIO 0x1600
> -#define STM32F429_PB6_FUNC_TIM4_CH1 0x1603
> -#define STM32F429_PB6_FUNC_I2C1_SCL 0x1605
> -#define STM32F429_PB6_FUNC_USART1_TX 0x1608
> -#define STM32F429_PB6_FUNC_CAN2_TX 0x160a
> -#define STM32F429_PB6_FUNC_FMC_SDNE1 0x160d
> -#define STM32F429_PB6_FUNC_DCMI_D5 0x160e
> -#define STM32F429_PB6_FUNC_EVENTOUT 0x1610
> -#define STM32F429_PB6_FUNC_ANALOG 0x1611
> -
> -#define STM32F429_PB7_FUNC_GPIO 0x1700
> -#define STM32F429_PB7_FUNC_TIM4_CH2 0x1703
> -#define STM32F429_PB7_FUNC_I2C1_SDA 0x1705
> -#define STM32F429_PB7_FUNC_USART1_RX 0x1708
> -#define STM32F429_PB7_FUNC_FMC_NL 0x170d
> -#define STM32F429_PB7_FUNC_DCMI_VSYNC 0x170e
> -#define STM32F429_PB7_FUNC_EVENTOUT 0x1710
> -#define STM32F429_PB7_FUNC_ANALOG 0x1711
> -
> -#define STM32F429_PB8_FUNC_GPIO 0x1800
> -#define STM32F429_PB8_FUNC_TIM4_CH3 0x1803
> -#define STM32F429_PB8_FUNC_TIM10_CH1 0x1804
> -#define STM32F429_PB8_FUNC_I2C1_SCL 0x1805
> -#define STM32F429_PB8_FUNC_CAN1_RX 0x180a
> -#define STM32F429_PB8_FUNC_ETH_MII_TXD3 0x180c
> -#define STM32F429_PB8_FUNC_SDIO_D4 0x180d
> -#define STM32F429_PB8_FUNC_DCMI_D6 0x180e
> -#define STM32F429_PB8_FUNC_LCD_B6 0x180f
> -#define STM32F429_PB8_FUNC_EVENTOUT 0x1810
> -#define STM32F429_PB8_FUNC_ANALOG 0x1811
> -
> -#define STM32F429_PB9_FUNC_GPIO 0x1900
> -#define STM32F429_PB9_FUNC_TIM4_CH4 0x1903
> -#define STM32F429_PB9_FUNC_TIM11_CH1 0x1904
> -#define STM32F429_PB9_FUNC_I2C1_SDA 0x1905
> -#define STM32F429_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906
> -#define STM32F429_PB9_FUNC_CAN1_TX 0x190a
> -#define STM32F429_PB9_FUNC_SDIO_D5 0x190d
> -#define STM32F429_PB9_FUNC_DCMI_D7 0x190e
> -#define STM32F429_PB9_FUNC_LCD_B7 0x190f
> -#define STM32F429_PB9_FUNC_EVENTOUT 0x1910
> -#define STM32F429_PB9_FUNC_ANALOG 0x1911
> -
> -#define STM32F429_PB10_FUNC_GPIO 0x1a00
> -#define STM32F429_PB10_FUNC_TIM2_CH3 0x1a02
> -#define STM32F429_PB10_FUNC_I2C2_SCL 0x1a05
> -#define STM32F429_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06
> -#define STM32F429_PB10_FUNC_USART3_TX 0x1a08
> -#define STM32F429_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b
> -#define STM32F429_PB10_FUNC_ETH_MII_RX_ER 0x1a0c
> -#define STM32F429_PB10_FUNC_LCD_G4 0x1a0f
> -#define STM32F429_PB10_FUNC_EVENTOUT 0x1a10
> -#define STM32F429_PB10_FUNC_ANALOG 0x1a11
> -
> -#define STM32F429_PB11_FUNC_GPIO 0x1b00
> -#define STM32F429_PB11_FUNC_TIM2_CH4 0x1b02
> -#define STM32F429_PB11_FUNC_I2C2_SDA 0x1b05
> -#define STM32F429_PB11_FUNC_USART3_RX 0x1b08
> -#define STM32F429_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b
> -#define STM32F429_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c
> -#define STM32F429_PB11_FUNC_LCD_G5 0x1b0f
> -#define STM32F429_PB11_FUNC_EVENTOUT 0x1b10
> -#define STM32F429_PB11_FUNC_ANALOG 0x1b11
> -
> -#define STM32F429_PB12_FUNC_GPIO 0x1c00
> -#define STM32F429_PB12_FUNC_TIM1_BKIN 0x1c02
> -#define STM32F429_PB12_FUNC_I2C2_SMBA 0x1c05
> -#define STM32F429_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06
> -#define STM32F429_PB12_FUNC_USART3_CK 0x1c08
> -#define STM32F429_PB12_FUNC_CAN2_RX 0x1c0a
> -#define STM32F429_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b
> -#define STM32F429_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c
> -#define STM32F429_PB12_FUNC_OTG_HS_ID 0x1c0d
> -#define STM32F429_PB12_FUNC_EVENTOUT 0x1c10
> -#define STM32F429_PB12_FUNC_ANALOG 0x1c11
> -
> -#define STM32F429_PB13_FUNC_GPIO 0x1d00
> -#define STM32F429_PB13_FUNC_TIM1_CH1N 0x1d02
> -#define STM32F429_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06
> -#define STM32F429_PB13_FUNC_USART3_CTS 0x1d08
> -#define STM32F429_PB13_FUNC_CAN2_TX 0x1d0a
> -#define STM32F429_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b
> -#define STM32F429_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c
> -#define STM32F429_PB13_FUNC_EVENTOUT 0x1d10
> -#define STM32F429_PB13_FUNC_ANALOG 0x1d11
> -
> -#define STM32F429_PB14_FUNC_GPIO 0x1e00
> -#define STM32F429_PB14_FUNC_TIM1_CH2N 0x1e02
> -#define STM32F429_PB14_FUNC_TIM8_CH2N 0x1e04
> -#define STM32F429_PB14_FUNC_SPI2_MISO 0x1e06
> -#define STM32F429_PB14_FUNC_I2S2EXT_SD 0x1e07
> -#define STM32F429_PB14_FUNC_USART3_RTS 0x1e08
> -#define STM32F429_PB14_FUNC_TIM12_CH1 0x1e0a
> -#define STM32F429_PB14_FUNC_OTG_HS_DM 0x1e0d
> -#define STM32F429_PB14_FUNC_EVENTOUT 0x1e10
> -#define STM32F429_PB14_FUNC_ANALOG 0x1e11
> -
> -#define STM32F429_PB15_FUNC_GPIO 0x1f00
> -#define STM32F429_PB15_FUNC_RTC_REFIN 0x1f01
> -#define STM32F429_PB15_FUNC_TIM1_CH3N 0x1f02
> -#define STM32F429_PB15_FUNC_TIM8_CH3N 0x1f04
> -#define STM32F429_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06
> -#define STM32F429_PB15_FUNC_TIM12_CH2 0x1f0a
> -#define STM32F429_PB15_FUNC_OTG_HS_DP 0x1f0d
> -#define STM32F429_PB15_FUNC_EVENTOUT 0x1f10
> -#define STM32F429_PB15_FUNC_ANALOG 0x1f11
> -
> -
> -
> -#define STM32F429_PC0_FUNC_GPIO 0x2000
> -#define STM32F429_PC0_FUNC_OTG_HS_ULPI_STP 0x200b
> -#define STM32F429_PC0_FUNC_FMC_SDNWE 0x200d
> -#define STM32F429_PC0_FUNC_EVENTOUT 0x2010
> -#define STM32F429_PC0_FUNC_ANALOG 0x2011
> -
> -#define STM32F429_PC1_FUNC_GPIO 0x2100
> -#define STM32F429_PC1_FUNC_ETH_MDC 0x210c
> -#define STM32F429_PC1_FUNC_EVENTOUT 0x2110
> -#define STM32F429_PC1_FUNC_ANALOG 0x2111
> -
> -#define STM32F429_PC2_FUNC_GPIO 0x2200
> -#define STM32F429_PC2_FUNC_SPI2_MISO 0x2206
> -#define STM32F429_PC2_FUNC_I2S2EXT_SD 0x2207
> -#define STM32F429_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b
> -#define STM32F429_PC2_FUNC_ETH_MII_TXD2 0x220c
> -#define STM32F429_PC2_FUNC_FMC_SDNE0 0x220d
> -#define STM32F429_PC2_FUNC_EVENTOUT 0x2210
> -#define STM32F429_PC2_FUNC_ANALOG 0x2211
> -
> -#define STM32F429_PC3_FUNC_GPIO 0x2300
> -#define STM32F429_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306
> -#define STM32F429_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b
> -#define STM32F429_PC3_FUNC_ETH_MII_TX_CLK 0x230c
> -#define STM32F429_PC3_FUNC_FMC_SDCKE0 0x230d
> -#define STM32F429_PC3_FUNC_EVENTOUT 0x2310
> -#define STM32F429_PC3_FUNC_ANALOG 0x2311
> -
> -#define STM32F429_PC4_FUNC_GPIO 0x2400
> -#define STM32F429_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c
> -#define STM32F429_PC4_FUNC_EVENTOUT 0x2410
> -#define STM32F429_PC4_FUNC_ANALOG 0x2411
> -
> -#define STM32F429_PC5_FUNC_GPIO 0x2500
> -#define STM32F429_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c
> -#define STM32F429_PC5_FUNC_EVENTOUT 0x2510
> -#define STM32F429_PC5_FUNC_ANALOG 0x2511
> -
> -#define STM32F429_PC6_FUNC_GPIO 0x2600
> -#define STM32F429_PC6_FUNC_TIM3_CH1 0x2603
> -#define STM32F429_PC6_FUNC_TIM8_CH1 0x2604
> -#define STM32F429_PC6_FUNC_I2S2_MCK 0x2606
> -#define STM32F429_PC6_FUNC_USART6_TX 0x2609
> -#define STM32F429_PC6_FUNC_SDIO_D6 0x260d
> -#define STM32F429_PC6_FUNC_DCMI_D0 0x260e
> -#define STM32F429_PC6_FUNC_LCD_HSYNC 0x260f
> -#define STM32F429_PC6_FUNC_EVENTOUT 0x2610
> -#define STM32F429_PC6_FUNC_ANALOG 0x2611
> -
> -#define STM32F429_PC7_FUNC_GPIO 0x2700
> -#define STM32F429_PC7_FUNC_TIM3_CH2 0x2703
> -#define STM32F429_PC7_FUNC_TIM8_CH2 0x2704
> -#define STM32F429_PC7_FUNC_I2S3_MCK 0x2707
> -#define STM32F429_PC7_FUNC_USART6_RX 0x2709
> -#define STM32F429_PC7_FUNC_SDIO_D7 0x270d
> -#define STM32F429_PC7_FUNC_DCMI_D1 0x270e
> -#define STM32F429_PC7_FUNC_LCD_G6 0x270f
> -#define STM32F429_PC7_FUNC_EVENTOUT 0x2710
> -#define STM32F429_PC7_FUNC_ANALOG 0x2711
> -
> -#define STM32F429_PC8_FUNC_GPIO 0x2800
> -#define STM32F429_PC8_FUNC_TIM3_CH3 0x2803
> -#define STM32F429_PC8_FUNC_TIM8_CH3 0x2804
> -#define STM32F429_PC8_FUNC_USART6_CK 0x2809
> -#define STM32F429_PC8_FUNC_SDIO_D0 0x280d
> -#define STM32F429_PC8_FUNC_DCMI_D2 0x280e
> -#define STM32F429_PC8_FUNC_EVENTOUT 0x2810
> -#define STM32F429_PC8_FUNC_ANALOG 0x2811
> -
> -#define STM32F429_PC9_FUNC_GPIO 0x2900
> -#define STM32F429_PC9_FUNC_MCO2 0x2901
> -#define STM32F429_PC9_FUNC_TIM3_CH4 0x2903
> -#define STM32F429_PC9_FUNC_TIM8_CH4 0x2904
> -#define STM32F429_PC9_FUNC_I2C3_SDA 0x2905
> -#define STM32F429_PC9_FUNC_I2S_CKIN 0x2906
> -#define STM32F429_PC9_FUNC_SDIO_D1 0x290d
> -#define STM32F429_PC9_FUNC_DCMI_D3 0x290e
> -#define STM32F429_PC9_FUNC_EVENTOUT 0x2910
> -#define STM32F429_PC9_FUNC_ANALOG 0x2911
> -
> -#define STM32F429_PC10_FUNC_GPIO 0x2a00
> -#define STM32F429_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07
> -#define STM32F429_PC10_FUNC_USART3_TX 0x2a08
> -#define STM32F429_PC10_FUNC_UART4_TX 0x2a09
> -#define STM32F429_PC10_FUNC_SDIO_D2 0x2a0d
> -#define STM32F429_PC10_FUNC_DCMI_D8 0x2a0e
> -#define STM32F429_PC10_FUNC_LCD_R2 0x2a0f
> -#define STM32F429_PC10_FUNC_EVENTOUT 0x2a10
> -#define STM32F429_PC10_FUNC_ANALOG 0x2a11
> -
> -#define STM32F429_PC11_FUNC_GPIO 0x2b00
> -#define STM32F429_PC11_FUNC_I2S3EXT_SD 0x2b06
> -#define STM32F429_PC11_FUNC_SPI3_MISO 0x2b07
> -#define STM32F429_PC11_FUNC_USART3_RX 0x2b08
> -#define STM32F429_PC11_FUNC_UART4_RX 0x2b09
> -#define STM32F429_PC11_FUNC_SDIO_D3 0x2b0d
> -#define STM32F429_PC11_FUNC_DCMI_D4 0x2b0e
> -#define STM32F429_PC11_FUNC_EVENTOUT 0x2b10
> -#define STM32F429_PC11_FUNC_ANALOG 0x2b11
> -
> -#define STM32F429_PC12_FUNC_GPIO 0x2c00
> -#define STM32F429_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07
> -#define STM32F429_PC12_FUNC_USART3_CK 0x2c08
> -#define STM32F429_PC12_FUNC_UART5_TX 0x2c09
> -#define STM32F429_PC12_FUNC_SDIO_CK 0x2c0d
> -#define STM32F429_PC12_FUNC_DCMI_D9 0x2c0e
> -#define STM32F429_PC12_FUNC_EVENTOUT 0x2c10
> -#define STM32F429_PC12_FUNC_ANALOG 0x2c11
> -
> -#define STM32F429_PC13_FUNC_GPIO 0x2d00
> -#define STM32F429_PC13_FUNC_EVENTOUT 0x2d10
> -#define STM32F429_PC13_FUNC_ANALOG 0x2d11
> -
> -#define STM32F429_PC14_FUNC_GPIO 0x2e00
> -#define STM32F429_PC14_FUNC_EVENTOUT 0x2e10
> -#define STM32F429_PC14_FUNC_ANALOG 0x2e11
> -
> -#define STM32F429_PC15_FUNC_GPIO 0x2f00
> -#define STM32F429_PC15_FUNC_EVENTOUT 0x2f10
> -#define STM32F429_PC15_FUNC_ANALOG 0x2f11
> -
> -
> -
> -#define STM32F429_PD0_FUNC_GPIO 0x3000
> -#define STM32F429_PD0_FUNC_CAN1_RX 0x300a
> -#define STM32F429_PD0_FUNC_FMC_D2 0x300d
> -#define STM32F429_PD0_FUNC_EVENTOUT 0x3010
> -#define STM32F429_PD0_FUNC_ANALOG 0x3011
> -
> -#define STM32F429_PD1_FUNC_GPIO 0x3100
> -#define STM32F429_PD1_FUNC_CAN1_TX 0x310a
> -#define STM32F429_PD1_FUNC_FMC_D3 0x310d
> -#define STM32F429_PD1_FUNC_EVENTOUT 0x3110
> -#define STM32F429_PD1_FUNC_ANALOG 0x3111
> -
> -#define STM32F429_PD2_FUNC_GPIO 0x3200
> -#define STM32F429_PD2_FUNC_TIM3_ETR 0x3203
> -#define STM32F429_PD2_FUNC_UART5_RX 0x3209
> -#define STM32F429_PD2_FUNC_SDIO_CMD 0x320d
> -#define STM32F429_PD2_FUNC_DCMI_D11 0x320e
> -#define STM32F429_PD2_FUNC_EVENTOUT 0x3210
> -#define STM32F429_PD2_FUNC_ANALOG 0x3211
> -
> -#define STM32F429_PD3_FUNC_GPIO 0x3300
> -#define STM32F429_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306
> -#define STM32F429_PD3_FUNC_USART2_CTS 0x3308
> -#define STM32F429_PD3_FUNC_FMC_CLK 0x330d
> -#define STM32F429_PD3_FUNC_DCMI_D5 0x330e
> -#define STM32F429_PD3_FUNC_LCD_G7 0x330f
> -#define STM32F429_PD3_FUNC_EVENTOUT 0x3310
> -#define STM32F429_PD3_FUNC_ANALOG 0x3311
> -
> -#define STM32F429_PD4_FUNC_GPIO 0x3400
> -#define STM32F429_PD4_FUNC_USART2_RTS 0x3408
> -#define STM32F429_PD4_FUNC_FMC_NOE 0x340d
> -#define STM32F429_PD4_FUNC_EVENTOUT 0x3410
> -#define STM32F429_PD4_FUNC_ANALOG 0x3411
> -
> -#define STM32F429_PD5_FUNC_GPIO 0x3500
> -#define STM32F429_PD5_FUNC_USART2_TX 0x3508
> -#define STM32F429_PD5_FUNC_FMC_NWE 0x350d
> -#define STM32F429_PD5_FUNC_EVENTOUT 0x3510
> -#define STM32F429_PD5_FUNC_ANALOG 0x3511
> -
> -#define STM32F429_PD6_FUNC_GPIO 0x3600
> -#define STM32F429_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606
> -#define STM32F429_PD6_FUNC_SAI1_SD_A 0x3607
> -#define STM32F429_PD6_FUNC_USART2_RX 0x3608
> -#define STM32F429_PD6_FUNC_FMC_NWAIT 0x360d
> -#define STM32F429_PD6_FUNC_DCMI_D10 0x360e
> -#define STM32F429_PD6_FUNC_LCD_B2 0x360f
> -#define STM32F429_PD6_FUNC_EVENTOUT 0x3610
> -#define STM32F429_PD6_FUNC_ANALOG 0x3611
> -
> -#define STM32F429_PD7_FUNC_GPIO 0x3700
> -#define STM32F429_PD7_FUNC_USART2_CK 0x3708
> -#define STM32F429_PD7_FUNC_FMC_NE1_FMC_NCE2 0x370d
> -#define STM32F429_PD7_FUNC_EVENTOUT 0x3710
> -#define STM32F429_PD7_FUNC_ANALOG 0x3711
> -
> -#define STM32F429_PD8_FUNC_GPIO 0x3800
> -#define STM32F429_PD8_FUNC_USART3_TX 0x3808
> -#define STM32F429_PD8_FUNC_FMC_D13 0x380d
> -#define STM32F429_PD8_FUNC_EVENTOUT 0x3810
> -#define STM32F429_PD8_FUNC_ANALOG 0x3811
> -
> -#define STM32F429_PD9_FUNC_GPIO 0x3900
> -#define STM32F429_PD9_FUNC_USART3_RX 0x3908
> -#define STM32F429_PD9_FUNC_FMC_D14 0x390d
> -#define STM32F429_PD9_FUNC_EVENTOUT 0x3910
> -#define STM32F429_PD9_FUNC_ANALOG 0x3911
> -
> -#define STM32F429_PD10_FUNC_GPIO 0x3a00
> -#define STM32F429_PD10_FUNC_USART3_CK 0x3a08
> -#define STM32F429_PD10_FUNC_FMC_D15 0x3a0d
> -#define STM32F429_PD10_FUNC_LCD_B3 0x3a0f
> -#define STM32F429_PD10_FUNC_EVENTOUT 0x3a10
> -#define STM32F429_PD10_FUNC_ANALOG 0x3a11
> -
> -#define STM32F429_PD11_FUNC_GPIO 0x3b00
> -#define STM32F429_PD11_FUNC_USART3_CTS 0x3b08
> -#define STM32F429_PD11_FUNC_FMC_A16 0x3b0d
> -#define STM32F429_PD11_FUNC_EVENTOUT 0x3b10
> -#define STM32F429_PD11_FUNC_ANALOG 0x3b11
> -
> -#define STM32F429_PD12_FUNC_GPIO 0x3c00
> -#define STM32F429_PD12_FUNC_TIM4_CH1 0x3c03
> -#define STM32F429_PD12_FUNC_USART3_RTS 0x3c08
> -#define STM32F429_PD12_FUNC_FMC_A17 0x3c0d
> -#define STM32F429_PD12_FUNC_EVENTOUT 0x3c10
> -#define STM32F429_PD12_FUNC_ANALOG 0x3c11
> -
> -#define STM32F429_PD13_FUNC_GPIO 0x3d00
> -#define STM32F429_PD13_FUNC_TIM4_CH2 0x3d03
> -#define STM32F429_PD13_FUNC_FMC_A18 0x3d0d
> -#define STM32F429_PD13_FUNC_EVENTOUT 0x3d10
> -#define STM32F429_PD13_FUNC_ANALOG 0x3d11
> -
> -#define STM32F429_PD14_FUNC_GPIO 0x3e00
> -#define STM32F429_PD14_FUNC_TIM4_CH3 0x3e03
> -#define STM32F429_PD14_FUNC_FMC_D0 0x3e0d
> -#define STM32F429_PD14_FUNC_EVENTOUT 0x3e10
> -#define STM32F429_PD14_FUNC_ANALOG 0x3e11
> -
> -#define STM32F429_PD15_FUNC_GPIO 0x3f00
> -#define STM32F429_PD15_FUNC_TIM4_CH4 0x3f03
> -#define STM32F429_PD15_FUNC_FMC_D1 0x3f0d
> -#define STM32F429_PD15_FUNC_EVENTOUT 0x3f10
> -#define STM32F429_PD15_FUNC_ANALOG 0x3f11
> -
> -
> -
> -#define STM32F429_PE0_FUNC_GPIO 0x4000
> -#define STM32F429_PE0_FUNC_TIM4_ETR 0x4003
> -#define STM32F429_PE0_FUNC_UART8_RX 0x4009
> -#define STM32F429_PE0_FUNC_FMC_NBL0 0x400d
> -#define STM32F429_PE0_FUNC_DCMI_D2 0x400e
> -#define STM32F429_PE0_FUNC_EVENTOUT 0x4010
> -#define STM32F429_PE0_FUNC_ANALOG 0x4011
> -
> -#define STM32F429_PE1_FUNC_GPIO 0x4100
> -#define STM32F429_PE1_FUNC_UART8_TX 0x4109
> -#define STM32F429_PE1_FUNC_FMC_NBL1 0x410d
> -#define STM32F429_PE1_FUNC_DCMI_D3 0x410e
> -#define STM32F429_PE1_FUNC_EVENTOUT 0x4110
> -#define STM32F429_PE1_FUNC_ANALOG 0x4111
> -
> -#define STM32F429_PE2_FUNC_GPIO 0x4200
> -#define STM32F429_PE2_FUNC_TRACECLK 0x4201
> -#define STM32F429_PE2_FUNC_SPI4_SCK 0x4206
> -#define STM32F429_PE2_FUNC_SAI1_MCLK_A 0x4207
> -#define STM32F429_PE2_FUNC_ETH_MII_TXD3 0x420c
> -#define STM32F429_PE2_FUNC_FMC_A23 0x420d
> -#define STM32F429_PE2_FUNC_EVENTOUT 0x4210
> -#define STM32F429_PE2_FUNC_ANALOG 0x4211
> -
> -#define STM32F429_PE3_FUNC_GPIO 0x4300
> -#define STM32F429_PE3_FUNC_TRACED0 0x4301
> -#define STM32F429_PE3_FUNC_SAI1_SD_B 0x4307
> -#define STM32F429_PE3_FUNC_FMC_A19 0x430d
> -#define STM32F429_PE3_FUNC_EVENTOUT 0x4310
> -#define STM32F429_PE3_FUNC_ANALOG 0x4311
> -
> -#define STM32F429_PE4_FUNC_GPIO 0x4400
> -#define STM32F429_PE4_FUNC_TRACED1 0x4401
> -#define STM32F429_PE4_FUNC_SPI4_NSS 0x4406
> -#define STM32F429_PE4_FUNC_SAI1_FS_A 0x4407
> -#define STM32F429_PE4_FUNC_FMC_A20 0x440d
> -#define STM32F429_PE4_FUNC_DCMI_D4 0x440e
> -#define STM32F429_PE4_FUNC_LCD_B0 0x440f
> -#define STM32F429_PE4_FUNC_EVENTOUT 0x4410
> -#define STM32F429_PE4_FUNC_ANALOG 0x4411
> -
> -#define STM32F429_PE5_FUNC_GPIO 0x4500
> -#define STM32F429_PE5_FUNC_TRACED2 0x4501
> -#define STM32F429_PE5_FUNC_TIM9_CH1 0x4504
> -#define STM32F429_PE5_FUNC_SPI4_MISO 0x4506
> -#define STM32F429_PE5_FUNC_SAI1_SCK_A 0x4507
> -#define STM32F429_PE5_FUNC_FMC_A21 0x450d
> -#define STM32F429_PE5_FUNC_DCMI_D6 0x450e
> -#define STM32F429_PE5_FUNC_LCD_G0 0x450f
> -#define STM32F429_PE5_FUNC_EVENTOUT 0x4510
> -#define STM32F429_PE5_FUNC_ANALOG 0x4511
> -
> -#define STM32F429_PE6_FUNC_GPIO 0x4600
> -#define STM32F429_PE6_FUNC_TRACED3 0x4601
> -#define STM32F429_PE6_FUNC_TIM9_CH2 0x4604
> -#define STM32F429_PE6_FUNC_SPI4_MOSI 0x4606
> -#define STM32F429_PE6_FUNC_SAI1_SD_A 0x4607
> -#define STM32F429_PE6_FUNC_FMC_A22 0x460d
> -#define STM32F429_PE6_FUNC_DCMI_D7 0x460e
> -#define STM32F429_PE6_FUNC_LCD_G1 0x460f
> -#define STM32F429_PE6_FUNC_EVENTOUT 0x4610
> -#define STM32F429_PE6_FUNC_ANALOG 0x4611
> -
> -#define STM32F429_PE7_FUNC_GPIO 0x4700
> -#define STM32F429_PE7_FUNC_TIM1_ETR 0x4702
> -#define STM32F429_PE7_FUNC_UART7_RX 0x4709
> -#define STM32F429_PE7_FUNC_FMC_D4 0x470d
> -#define STM32F429_PE7_FUNC_EVENTOUT 0x4710
> -#define STM32F429_PE7_FUNC_ANALOG 0x4711
> -
> -#define STM32F429_PE8_FUNC_GPIO 0x4800
> -#define STM32F429_PE8_FUNC_TIM1_CH1N 0x4802
> -#define STM32F429_PE8_FUNC_UART7_TX 0x4809
> -#define STM32F429_PE8_FUNC_FMC_D5 0x480d
> -#define STM32F429_PE8_FUNC_EVENTOUT 0x4810
> -#define STM32F429_PE8_FUNC_ANALOG 0x4811
> -
> -#define STM32F429_PE9_FUNC_GPIO 0x4900
> -#define STM32F429_PE9_FUNC_TIM1_CH1 0x4902
> -#define STM32F429_PE9_FUNC_FMC_D6 0x490d
> -#define STM32F429_PE9_FUNC_EVENTOUT 0x4910
> -#define STM32F429_PE9_FUNC_ANALOG 0x4911
> -
> -#define STM32F429_PE10_FUNC_GPIO 0x4a00
> -#define STM32F429_PE10_FUNC_TIM1_CH2N 0x4a02
> -#define STM32F429_PE10_FUNC_FMC_D7 0x4a0d
> -#define STM32F429_PE10_FUNC_EVENTOUT 0x4a10
> -#define STM32F429_PE10_FUNC_ANALOG 0x4a11
> -
> -#define STM32F429_PE11_FUNC_GPIO 0x4b00
> -#define STM32F429_PE11_FUNC_TIM1_CH2 0x4b02
> -#define STM32F429_PE11_FUNC_SPI4_NSS 0x4b06
> -#define STM32F429_PE11_FUNC_FMC_D8 0x4b0d
> -#define STM32F429_PE11_FUNC_LCD_G3 0x4b0f
> -#define STM32F429_PE11_FUNC_EVENTOUT 0x4b10
> -#define STM32F429_PE11_FUNC_ANALOG 0x4b11
> -
> -#define STM32F429_PE12_FUNC_GPIO 0x4c00
> -#define STM32F429_PE12_FUNC_TIM1_CH3N 0x4c02
> -#define STM32F429_PE12_FUNC_SPI4_SCK 0x4c06
> -#define STM32F429_PE12_FUNC_FMC_D9 0x4c0d
> -#define STM32F429_PE12_FUNC_LCD_B4 0x4c0f
> -#define STM32F429_PE12_FUNC_EVENTOUT 0x4c10
> -#define STM32F429_PE12_FUNC_ANALOG 0x4c11
> -
> -#define STM32F429_PE13_FUNC_GPIO 0x4d00
> -#define STM32F429_PE13_FUNC_TIM1_CH3 0x4d02
> -#define STM32F429_PE13_FUNC_SPI4_MISO 0x4d06
> -#define STM32F429_PE13_FUNC_FMC_D10 0x4d0d
> -#define STM32F429_PE13_FUNC_LCD_DE 0x4d0f
> -#define STM32F429_PE13_FUNC_EVENTOUT 0x4d10
> -#define STM32F429_PE13_FUNC_ANALOG 0x4d11
> -
> -#define STM32F429_PE14_FUNC_GPIO 0x4e00
> -#define STM32F429_PE14_FUNC_TIM1_CH4 0x4e02
> -#define STM32F429_PE14_FUNC_SPI4_MOSI 0x4e06
> -#define STM32F429_PE14_FUNC_FMC_D11 0x4e0d
> -#define STM32F429_PE14_FUNC_LCD_CLK 0x4e0f
> -#define STM32F429_PE14_FUNC_EVENTOUT 0x4e10
> -#define STM32F429_PE14_FUNC_ANALOG 0x4e11
> -
> -#define STM32F429_PE15_FUNC_GPIO 0x4f00
> -#define STM32F429_PE15_FUNC_TIM1_BKIN 0x4f02
> -#define STM32F429_PE15_FUNC_FMC_D12 0x4f0d
> -#define STM32F429_PE15_FUNC_LCD_R7 0x4f0f
> -#define STM32F429_PE15_FUNC_EVENTOUT 0x4f10
> -#define STM32F429_PE15_FUNC_ANALOG 0x4f11
> -
> -
> -
> -#define STM32F429_PF0_FUNC_GPIO 0x5000
> -#define STM32F429_PF0_FUNC_I2C2_SDA 0x5005
> -#define STM32F429_PF0_FUNC_FMC_A0 0x500d
> -#define STM32F429_PF0_FUNC_EVENTOUT 0x5010
> -#define STM32F429_PF0_FUNC_ANALOG 0x5011
> -
> -#define STM32F429_PF1_FUNC_GPIO 0x5100
> -#define STM32F429_PF1_FUNC_I2C2_SCL 0x5105
> -#define STM32F429_PF1_FUNC_FMC_A1 0x510d
> -#define STM32F429_PF1_FUNC_EVENTOUT 0x5110
> -#define STM32F429_PF1_FUNC_ANALOG 0x5111
> -
> -#define STM32F429_PF2_FUNC_GPIO 0x5200
> -#define STM32F429_PF2_FUNC_I2C2_SMBA 0x5205
> -#define STM32F429_PF2_FUNC_FMC_A2 0x520d
> -#define STM32F429_PF2_FUNC_EVENTOUT 0x5210
> -#define STM32F429_PF2_FUNC_ANALOG 0x5211
> -
> -#define STM32F429_PF3_FUNC_GPIO 0x5300
> -#define STM32F429_PF3_FUNC_FMC_A3 0x530d
> -#define STM32F429_PF3_FUNC_EVENTOUT 0x5310
> -#define STM32F429_PF3_FUNC_ANALOG 0x5311
> -
> -#define STM32F429_PF4_FUNC_GPIO 0x5400
> -#define STM32F429_PF4_FUNC_FMC_A4 0x540d
> -#define STM32F429_PF4_FUNC_EVENTOUT 0x5410
> -#define STM32F429_PF4_FUNC_ANALOG 0x5411
> -
> -#define STM32F429_PF5_FUNC_GPIO 0x5500
> -#define STM32F429_PF5_FUNC_FMC_A5 0x550d
> -#define STM32F429_PF5_FUNC_EVENTOUT 0x5510
> -#define STM32F429_PF5_FUNC_ANALOG 0x5511
> -
> -#define STM32F429_PF6_FUNC_GPIO 0x5600
> -#define STM32F429_PF6_FUNC_TIM10_CH1 0x5604
> -#define STM32F429_PF6_FUNC_SPI5_NSS 0x5606
> -#define STM32F429_PF6_FUNC_SAI1_SD_B 0x5607
> -#define STM32F429_PF6_FUNC_UART7_RX 0x5609
> -#define STM32F429_PF6_FUNC_FMC_NIORD 0x560d
> -#define STM32F429_PF6_FUNC_EVENTOUT 0x5610
> -#define STM32F429_PF6_FUNC_ANALOG 0x5611
> -
> -#define STM32F429_PF7_FUNC_GPIO 0x5700
> -#define STM32F429_PF7_FUNC_TIM11_CH1 0x5704
> -#define STM32F429_PF7_FUNC_SPI5_SCK 0x5706
> -#define STM32F429_PF7_FUNC_SAI1_MCLK_B 0x5707
> -#define STM32F429_PF7_FUNC_UART7_TX 0x5709
> -#define STM32F429_PF7_FUNC_FMC_NREG 0x570d
> -#define STM32F429_PF7_FUNC_EVENTOUT 0x5710
> -#define STM32F429_PF7_FUNC_ANALOG 0x5711
> -
> -#define STM32F429_PF8_FUNC_GPIO 0x5800
> -#define STM32F429_PF8_FUNC_SPI5_MISO 0x5806
> -#define STM32F429_PF8_FUNC_SAI1_SCK_B 0x5807
> -#define STM32F429_PF8_FUNC_TIM13_CH1 0x580a
> -#define STM32F429_PF8_FUNC_FMC_NIOWR 0x580d
> -#define STM32F429_PF8_FUNC_EVENTOUT 0x5810
> -#define STM32F429_PF8_FUNC_ANALOG 0x5811
> -
> -#define STM32F429_PF9_FUNC_GPIO 0x5900
> -#define STM32F429_PF9_FUNC_SPI5_MOSI 0x5906
> -#define STM32F429_PF9_FUNC_SAI1_FS_B 0x5907
> -#define STM32F429_PF9_FUNC_TIM14_CH1 0x590a
> -#define STM32F429_PF9_FUNC_FMC_CD 0x590d
> -#define STM32F429_PF9_FUNC_EVENTOUT 0x5910
> -#define STM32F429_PF9_FUNC_ANALOG 0x5911
> -
> -#define STM32F429_PF10_FUNC_GPIO 0x5a00
> -#define STM32F429_PF10_FUNC_FMC_INTR 0x5a0d
> -#define STM32F429_PF10_FUNC_DCMI_D11 0x5a0e
> -#define STM32F429_PF10_FUNC_LCD_DE 0x5a0f
> -#define STM32F429_PF10_FUNC_EVENTOUT 0x5a10
> -#define STM32F429_PF10_FUNC_ANALOG 0x5a11
> -
> -#define STM32F429_PF11_FUNC_GPIO 0x5b00
> -#define STM32F429_PF11_FUNC_SPI5_MOSI 0x5b06
> -#define STM32F429_PF11_FUNC_FMC_SDNRAS 0x5b0d
> -#define STM32F429_PF11_FUNC_DCMI_D12 0x5b0e
> -#define STM32F429_PF11_FUNC_EVENTOUT 0x5b10
> -#define STM32F429_PF11_FUNC_ANALOG 0x5b11
> -
> -#define STM32F429_PF12_FUNC_GPIO 0x5c00
> -#define STM32F429_PF12_FUNC_FMC_A6 0x5c0d
> -#define STM32F429_PF12_FUNC_EVENTOUT 0x5c10
> -#define STM32F429_PF12_FUNC_ANALOG 0x5c11
> -
> -#define STM32F429_PF13_FUNC_GPIO 0x5d00
> -#define STM32F429_PF13_FUNC_FMC_A7 0x5d0d
> -#define STM32F429_PF13_FUNC_EVENTOUT 0x5d10
> -#define STM32F429_PF13_FUNC_ANALOG 0x5d11
> -
> -#define STM32F429_PF14_FUNC_GPIO 0x5e00
> -#define STM32F429_PF14_FUNC_FMC_A8 0x5e0d
> -#define STM32F429_PF14_FUNC_EVENTOUT 0x5e10
> -#define STM32F429_PF14_FUNC_ANALOG 0x5e11
> -
> -#define STM32F429_PF15_FUNC_GPIO 0x5f00
> -#define STM32F429_PF15_FUNC_FMC_A9 0x5f0d
> -#define STM32F429_PF15_FUNC_EVENTOUT 0x5f10
> -#define STM32F429_PF15_FUNC_ANALOG 0x5f11
> -
> -
> -
> -#define STM32F429_PG0_FUNC_GPIO 0x6000
> -#define STM32F429_PG0_FUNC_FMC_A10 0x600d
> -#define STM32F429_PG0_FUNC_EVENTOUT 0x6010
> -#define STM32F429_PG0_FUNC_ANALOG 0x6011
> -
> -#define STM32F429_PG1_FUNC_GPIO 0x6100
> -#define STM32F429_PG1_FUNC_FMC_A11 0x610d
> -#define STM32F429_PG1_FUNC_EVENTOUT 0x6110
> -#define STM32F429_PG1_FUNC_ANALOG 0x6111
> -
> -#define STM32F429_PG2_FUNC_GPIO 0x6200
> -#define STM32F429_PG2_FUNC_FMC_A12 0x620d
> -#define STM32F429_PG2_FUNC_EVENTOUT 0x6210
> -#define STM32F429_PG2_FUNC_ANALOG 0x6211
> -
> -#define STM32F429_PG3_FUNC_GPIO 0x6300
> -#define STM32F429_PG3_FUNC_FMC_A13 0x630d
> -#define STM32F429_PG3_FUNC_EVENTOUT 0x6310
> -#define STM32F429_PG3_FUNC_ANALOG 0x6311
> -
> -#define STM32F429_PG4_FUNC_GPIO 0x6400
> -#define STM32F429_PG4_FUNC_FMC_A14_FMC_BA0 0x640d
> -#define STM32F429_PG4_FUNC_EVENTOUT 0x6410
> -#define STM32F429_PG4_FUNC_ANALOG 0x6411
> -
> -#define STM32F429_PG5_FUNC_GPIO 0x6500
> -#define STM32F429_PG5_FUNC_FMC_A15_FMC_BA1 0x650d
> -#define STM32F429_PG5_FUNC_EVENTOUT 0x6510
> -#define STM32F429_PG5_FUNC_ANALOG 0x6511
> -
> -#define STM32F429_PG6_FUNC_GPIO 0x6600
> -#define STM32F429_PG6_FUNC_FMC_INT2 0x660d
> -#define STM32F429_PG6_FUNC_DCMI_D12 0x660e
> -#define STM32F429_PG6_FUNC_LCD_R7 0x660f
> -#define STM32F429_PG6_FUNC_EVENTOUT 0x6610
> -#define STM32F429_PG6_FUNC_ANALOG 0x6611
> -
> -#define STM32F429_PG7_FUNC_GPIO 0x6700
> -#define STM32F429_PG7_FUNC_USART6_CK 0x6709
> -#define STM32F429_PG7_FUNC_FMC_INT3 0x670d
> -#define STM32F429_PG7_FUNC_DCMI_D13 0x670e
> -#define STM32F429_PG7_FUNC_LCD_CLK 0x670f
> -#define STM32F429_PG7_FUNC_EVENTOUT 0x6710
> -#define STM32F429_PG7_FUNC_ANALOG 0x6711
> -
> -#define STM32F429_PG8_FUNC_GPIO 0x6800
> -#define STM32F429_PG8_FUNC_SPI6_NSS 0x6806
> -#define STM32F429_PG8_FUNC_USART6_RTS 0x6809
> -#define STM32F429_PG8_FUNC_ETH_PPS_OUT 0x680c
> -#define STM32F429_PG8_FUNC_FMC_SDCLK 0x680d
> -#define STM32F429_PG8_FUNC_EVENTOUT 0x6810
> -#define STM32F429_PG8_FUNC_ANALOG 0x6811
> -
> -#define STM32F429_PG9_FUNC_GPIO 0x6900
> -#define STM32F429_PG9_FUNC_USART6_RX 0x6909
> -#define STM32F429_PG9_FUNC_FMC_NE2_FMC_NCE3 0x690d
> -#define STM32F429_PG9_FUNC_DCMI_VSYNC 0x690e
> -#define STM32F429_PG9_FUNC_EVENTOUT 0x6910
> -#define STM32F429_PG9_FUNC_ANALOG 0x6911
> -
> -#define STM32F429_PG10_FUNC_GPIO 0x6a00
> -#define STM32F429_PG10_FUNC_LCD_G3 0x6a0a
> -#define STM32F429_PG10_FUNC_FMC_NCE4_1_FMC_NE3 0x6a0d
> -#define STM32F429_PG10_FUNC_DCMI_D2 0x6a0e
> -#define STM32F429_PG10_FUNC_LCD_B2 0x6a0f
> -#define STM32F429_PG10_FUNC_EVENTOUT 0x6a10
> -#define STM32F429_PG10_FUNC_ANALOG 0x6a11
> -
> -#define STM32F429_PG11_FUNC_GPIO 0x6b00
> -#define STM32F429_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c
> -#define STM32F429_PG11_FUNC_FMC_NCE4_2 0x6b0d
> -#define STM32F429_PG11_FUNC_DCMI_D3 0x6b0e
> -#define STM32F429_PG11_FUNC_LCD_B3 0x6b0f
> -#define STM32F429_PG11_FUNC_EVENTOUT 0x6b10
> -#define STM32F429_PG11_FUNC_ANALOG 0x6b11
> -
> -#define STM32F429_PG12_FUNC_GPIO 0x6c00
> -#define STM32F429_PG12_FUNC_SPI6_MISO 0x6c06
> -#define STM32F429_PG12_FUNC_USART6_RTS 0x6c09
> -#define STM32F429_PG12_FUNC_LCD_B4 0x6c0a
> -#define STM32F429_PG12_FUNC_FMC_NE4 0x6c0d
> -#define STM32F429_PG12_FUNC_LCD_B1 0x6c0f
> -#define STM32F429_PG12_FUNC_EVENTOUT 0x6c10
> -#define STM32F429_PG12_FUNC_ANALOG 0x6c11
> -
> -#define STM32F429_PG13_FUNC_GPIO 0x6d00
> -#define STM32F429_PG13_FUNC_SPI6_SCK 0x6d06
> -#define STM32F429_PG13_FUNC_USART6_CTS 0x6d09
> -#define STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c
> -#define STM32F429_PG13_FUNC_FMC_A24 0x6d0d
> -#define STM32F429_PG13_FUNC_EVENTOUT 0x6d10
> -#define STM32F429_PG13_FUNC_ANALOG 0x6d11
> -
> -#define STM32F429_PG14_FUNC_GPIO 0x6e00
> -#define STM32F429_PG14_FUNC_SPI6_MOSI 0x6e06
> -#define STM32F429_PG14_FUNC_USART6_TX 0x6e09
> -#define STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c
> -#define STM32F429_PG14_FUNC_FMC_A25 0x6e0d
> -#define STM32F429_PG14_FUNC_EVENTOUT 0x6e10
> -#define STM32F429_PG14_FUNC_ANALOG 0x6e11
> -
> -#define STM32F429_PG15_FUNC_GPIO 0x6f00
> -#define STM32F429_PG15_FUNC_USART6_CTS 0x6f09
> -#define STM32F429_PG15_FUNC_FMC_SDNCAS 0x6f0d
> -#define STM32F429_PG15_FUNC_DCMI_D13 0x6f0e
> -#define STM32F429_PG15_FUNC_EVENTOUT 0x6f10
> -#define STM32F429_PG15_FUNC_ANALOG 0x6f11
> -
> -
> -
> -#define STM32F429_PH0_FUNC_GPIO 0x7000
> -#define STM32F429_PH0_FUNC_EVENTOUT 0x7010
> -#define STM32F429_PH0_FUNC_ANALOG 0x7011
> -
> -#define STM32F429_PH1_FUNC_GPIO 0x7100
> -#define STM32F429_PH1_FUNC_EVENTOUT 0x7110
> -#define STM32F429_PH1_FUNC_ANALOG 0x7111
> -
> -#define STM32F429_PH2_FUNC_GPIO 0x7200
> -#define STM32F429_PH2_FUNC_ETH_MII_CRS 0x720c
> -#define STM32F429_PH2_FUNC_FMC_SDCKE0 0x720d
> -#define STM32F429_PH2_FUNC_LCD_R0 0x720f
> -#define STM32F429_PH2_FUNC_EVENTOUT 0x7210
> -#define STM32F429_PH2_FUNC_ANALOG 0x7211
> -
> -#define STM32F429_PH3_FUNC_GPIO 0x7300
> -#define STM32F429_PH3_FUNC_ETH_MII_COL 0x730c
> -#define STM32F429_PH3_FUNC_FMC_SDNE0 0x730d
> -#define STM32F429_PH3_FUNC_LCD_R1 0x730f
> -#define STM32F429_PH3_FUNC_EVENTOUT 0x7310
> -#define STM32F429_PH3_FUNC_ANALOG 0x7311
> -
> -#define STM32F429_PH4_FUNC_GPIO 0x7400
> -#define STM32F429_PH4_FUNC_I2C2_SCL 0x7405
> -#define STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b
> -#define STM32F429_PH4_FUNC_EVENTOUT 0x7410
> -#define STM32F429_PH4_FUNC_ANALOG 0x7411
> -
> -#define STM32F429_PH5_FUNC_GPIO 0x7500
> -#define STM32F429_PH5_FUNC_I2C2_SDA 0x7505
> -#define STM32F429_PH5_FUNC_SPI5_NSS 0x7506
> -#define STM32F429_PH5_FUNC_FMC_SDNWE 0x750d
> -#define STM32F429_PH5_FUNC_EVENTOUT 0x7510
> -#define STM32F429_PH5_FUNC_ANALOG 0x7511
> -
> -#define STM32F429_PH6_FUNC_GPIO 0x7600
> -#define STM32F429_PH6_FUNC_I2C2_SMBA 0x7605
> -#define STM32F429_PH6_FUNC_SPI5_SCK 0x7606
> -#define STM32F429_PH6_FUNC_TIM12_CH1 0x760a
> -#define STM32F429_PH6_FUNC_ETH_MII_RXD2 0x760c
> -#define STM32F429_PH6_FUNC_FMC_SDNE1 0x760d
> -#define STM32F429_PH6_FUNC_DCMI_D8 0x760e
> -#define STM32F429_PH6_FUNC_EVENTOUT 0x7610
> -#define STM32F429_PH6_FUNC_ANALOG 0x7611
> -
> -#define STM32F429_PH7_FUNC_GPIO 0x7700
> -#define STM32F429_PH7_FUNC_I2C3_SCL 0x7705
> -#define STM32F429_PH7_FUNC_SPI5_MISO 0x7706
> -#define STM32F429_PH7_FUNC_ETH_MII_RXD3 0x770c
> -#define STM32F429_PH7_FUNC_FMC_SDCKE1 0x770d
> -#define STM32F429_PH7_FUNC_DCMI_D9 0x770e
> -#define STM32F429_PH7_FUNC_EVENTOUT 0x7710
> -#define STM32F429_PH7_FUNC_ANALOG 0x7711
> -
> -#define STM32F429_PH8_FUNC_GPIO 0x7800
> -#define STM32F429_PH8_FUNC_I2C3_SDA 0x7805
> -#define STM32F429_PH8_FUNC_FMC_D16 0x780d
> -#define STM32F429_PH8_FUNC_DCMI_HSYNC 0x780e
> -#define STM32F429_PH8_FUNC_LCD_R2 0x780f
> -#define STM32F429_PH8_FUNC_EVENTOUT 0x7810
> -#define STM32F429_PH8_FUNC_ANALOG 0x7811
> -
> -#define STM32F429_PH9_FUNC_GPIO 0x7900
> -#define STM32F429_PH9_FUNC_I2C3_SMBA 0x7905
> -#define STM32F429_PH9_FUNC_TIM12_CH2 0x790a
> -#define STM32F429_PH9_FUNC_FMC_D17 0x790d
> -#define STM32F429_PH9_FUNC_DCMI_D0 0x790e
> -#define STM32F429_PH9_FUNC_LCD_R3 0x790f
> -#define STM32F429_PH9_FUNC_EVENTOUT 0x7910
> -#define STM32F429_PH9_FUNC_ANALOG 0x7911
> -
> -#define STM32F429_PH10_FUNC_GPIO 0x7a00
> -#define STM32F429_PH10_FUNC_TIM5_CH1 0x7a03
> -#define STM32F429_PH10_FUNC_FMC_D18 0x7a0d
> -#define STM32F429_PH10_FUNC_DCMI_D1 0x7a0e
> -#define STM32F429_PH10_FUNC_LCD_R4 0x7a0f
> -#define STM32F429_PH10_FUNC_EVENTOUT 0x7a10
> -#define STM32F429_PH10_FUNC_ANALOG 0x7a11
> -
> -#define STM32F429_PH11_FUNC_GPIO 0x7b00
> -#define STM32F429_PH11_FUNC_TIM5_CH2 0x7b03
> -#define STM32F429_PH11_FUNC_FMC_D19 0x7b0d
> -#define STM32F429_PH11_FUNC_DCMI_D2 0x7b0e
> -#define STM32F429_PH11_FUNC_LCD_R5 0x7b0f
> -#define STM32F429_PH11_FUNC_EVENTOUT 0x7b10
> -#define STM32F429_PH11_FUNC_ANALOG 0x7b11
> -
> -#define STM32F429_PH12_FUNC_GPIO 0x7c00
> -#define STM32F429_PH12_FUNC_TIM5_CH3 0x7c03
> -#define STM32F429_PH12_FUNC_FMC_D20 0x7c0d
> -#define STM32F429_PH12_FUNC_DCMI_D3 0x7c0e
> -#define STM32F429_PH12_FUNC_LCD_R6 0x7c0f
> -#define STM32F429_PH12_FUNC_EVENTOUT 0x7c10
> -#define STM32F429_PH12_FUNC_ANALOG 0x7c11
> -
> -#define STM32F429_PH13_FUNC_GPIO 0x7d00
> -#define STM32F429_PH13_FUNC_TIM8_CH1N 0x7d04
> -#define STM32F429_PH13_FUNC_CAN1_TX 0x7d0a
> -#define STM32F429_PH13_FUNC_FMC_D21 0x7d0d
> -#define STM32F429_PH13_FUNC_LCD_G2 0x7d0f
> -#define STM32F429_PH13_FUNC_EVENTOUT 0x7d10
> -#define STM32F429_PH13_FUNC_ANALOG 0x7d11
> -
> -#define STM32F429_PH14_FUNC_GPIO 0x7e00
> -#define STM32F429_PH14_FUNC_TIM8_CH2N 0x7e04
> -#define STM32F429_PH14_FUNC_FMC_D22 0x7e0d
> -#define STM32F429_PH14_FUNC_DCMI_D4 0x7e0e
> -#define STM32F429_PH14_FUNC_LCD_G3 0x7e0f
> -#define STM32F429_PH14_FUNC_EVENTOUT 0x7e10
> -#define STM32F429_PH14_FUNC_ANALOG 0x7e11
> -
> -#define STM32F429_PH15_FUNC_GPIO 0x7f00
> -#define STM32F429_PH15_FUNC_TIM8_CH3N 0x7f04
> -#define STM32F429_PH15_FUNC_FMC_D23 0x7f0d
> -#define STM32F429_PH15_FUNC_DCMI_D11 0x7f0e
> -#define STM32F429_PH15_FUNC_LCD_G4 0x7f0f
> -#define STM32F429_PH15_FUNC_EVENTOUT 0x7f10
> -#define STM32F429_PH15_FUNC_ANALOG 0x7f11
> -
> -
> -
> -#define STM32F429_PI0_FUNC_GPIO 0x8000
> -#define STM32F429_PI0_FUNC_TIM5_CH4 0x8003
> -#define STM32F429_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006
> -#define STM32F429_PI0_FUNC_FMC_D24 0x800d
> -#define STM32F429_PI0_FUNC_DCMI_D13 0x800e
> -#define STM32F429_PI0_FUNC_LCD_G5 0x800f
> -#define STM32F429_PI0_FUNC_EVENTOUT 0x8010
> -#define STM32F429_PI0_FUNC_ANALOG 0x8011
> -
> -#define STM32F429_PI1_FUNC_GPIO 0x8100
> -#define STM32F429_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106
> -#define STM32F429_PI1_FUNC_FMC_D25 0x810d
> -#define STM32F429_PI1_FUNC_DCMI_D8 0x810e
> -#define STM32F429_PI1_FUNC_LCD_G6 0x810f
> -#define STM32F429_PI1_FUNC_EVENTOUT 0x8110
> -#define STM32F429_PI1_FUNC_ANALOG 0x8111
> -
> -#define STM32F429_PI2_FUNC_GPIO 0x8200
> -#define STM32F429_PI2_FUNC_TIM8_CH4 0x8204
> -#define STM32F429_PI2_FUNC_SPI2_MISO 0x8206
> -#define STM32F429_PI2_FUNC_I2S2EXT_SD 0x8207
> -#define STM32F429_PI2_FUNC_FMC_D26 0x820d
> -#define STM32F429_PI2_FUNC_DCMI_D9 0x820e
> -#define STM32F429_PI2_FUNC_LCD_G7 0x820f
> -#define STM32F429_PI2_FUNC_EVENTOUT 0x8210
> -#define STM32F429_PI2_FUNC_ANALOG 0x8211
> -
> -#define STM32F429_PI3_FUNC_GPIO 0x8300
> -#define STM32F429_PI3_FUNC_TIM8_ETR 0x8304
> -#define STM32F429_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306
> -#define STM32F429_PI3_FUNC_FMC_D27 0x830d
> -#define STM32F429_PI3_FUNC_DCMI_D10 0x830e
> -#define STM32F429_PI3_FUNC_EVENTOUT 0x8310
> -#define STM32F429_PI3_FUNC_ANALOG 0x8311
> -
> -#define STM32F429_PI4_FUNC_GPIO 0x8400
> -#define STM32F429_PI4_FUNC_TIM8_BKIN 0x8404
> -#define STM32F429_PI4_FUNC_FMC_NBL2 0x840d
> -#define STM32F429_PI4_FUNC_DCMI_D5 0x840e
> -#define STM32F429_PI4_FUNC_LCD_B4 0x840f
> -#define STM32F429_PI4_FUNC_EVENTOUT 0x8410
> -#define STM32F429_PI4_FUNC_ANALOG 0x8411
> -
> -#define STM32F429_PI5_FUNC_GPIO 0x8500
> -#define STM32F429_PI5_FUNC_TIM8_CH1 0x8504
> -#define STM32F429_PI5_FUNC_FMC_NBL3 0x850d
> -#define STM32F429_PI5_FUNC_DCMI_VSYNC 0x850e
> -#define STM32F429_PI5_FUNC_LCD_B5 0x850f
> -#define STM32F429_PI5_FUNC_EVENTOUT 0x8510
> -#define STM32F429_PI5_FUNC_ANALOG 0x8511
> -
> -#define STM32F429_PI6_FUNC_GPIO 0x8600
> -#define STM32F429_PI6_FUNC_TIM8_CH2 0x8604
> -#define STM32F429_PI6_FUNC_FMC_D28 0x860d
> -#define STM32F429_PI6_FUNC_DCMI_D6 0x860e
> -#define STM32F429_PI6_FUNC_LCD_B6 0x860f
> -#define STM32F429_PI6_FUNC_EVENTOUT 0x8610
> -#define STM32F429_PI6_FUNC_ANALOG 0x8611
> -
> -#define STM32F429_PI7_FUNC_GPIO 0x8700
> -#define STM32F429_PI7_FUNC_TIM8_CH3 0x8704
> -#define STM32F429_PI7_FUNC_FMC_D29 0x870d
> -#define STM32F429_PI7_FUNC_DCMI_D7 0x870e
> -#define STM32F429_PI7_FUNC_LCD_B7 0x870f
> -#define STM32F429_PI7_FUNC_EVENTOUT 0x8710
> -#define STM32F429_PI7_FUNC_ANALOG 0x8711
> -
> -#define STM32F429_PI8_FUNC_GPIO 0x8800
> -#define STM32F429_PI8_FUNC_EVENTOUT 0x8810
> -#define STM32F429_PI8_FUNC_ANALOG 0x8811
> -
> -#define STM32F429_PI9_FUNC_GPIO 0x8900
> -#define STM32F429_PI9_FUNC_CAN1_RX 0x890a
> -#define STM32F429_PI9_FUNC_FMC_D30 0x890d
> -#define STM32F429_PI9_FUNC_LCD_VSYNC 0x890f
> -#define STM32F429_PI9_FUNC_EVENTOUT 0x8910
> -#define STM32F429_PI9_FUNC_ANALOG 0x8911
> -
> -#define STM32F429_PI10_FUNC_GPIO 0x8a00
> -#define STM32F429_PI10_FUNC_ETH_MII_RX_ER 0x8a0c
> -#define STM32F429_PI10_FUNC_FMC_D31 0x8a0d
> -#define STM32F429_PI10_FUNC_LCD_HSYNC 0x8a0f
> -#define STM32F429_PI10_FUNC_EVENTOUT 0x8a10
> -#define STM32F429_PI10_FUNC_ANALOG 0x8a11
> -
> -#define STM32F429_PI11_FUNC_GPIO 0x8b00
> -#define STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b
> -#define STM32F429_PI11_FUNC_EVENTOUT 0x8b10
> -#define STM32F429_PI11_FUNC_ANALOG 0x8b11
> -
> -#define STM32F429_PI12_FUNC_GPIO 0x8c00
> -#define STM32F429_PI12_FUNC_LCD_HSYNC 0x8c0f
> -#define STM32F429_PI12_FUNC_EVENTOUT 0x8c10
> -#define STM32F429_PI12_FUNC_ANALOG 0x8c11
> -
> -#define STM32F429_PI13_FUNC_GPIO 0x8d00
> -#define STM32F429_PI13_FUNC_LCD_VSYNC 0x8d0f
> -#define STM32F429_PI13_FUNC_EVENTOUT 0x8d10
> -#define STM32F429_PI13_FUNC_ANALOG 0x8d11
> -
> -#define STM32F429_PI14_FUNC_GPIO 0x8e00
> -#define STM32F429_PI14_FUNC_LCD_CLK 0x8e0f
> -#define STM32F429_PI14_FUNC_EVENTOUT 0x8e10
> -#define STM32F429_PI14_FUNC_ANALOG 0x8e11
> -
> -#define STM32F429_PI15_FUNC_GPIO 0x8f00
> -#define STM32F429_PI15_FUNC_LCD_R0 0x8f0f
> -#define STM32F429_PI15_FUNC_EVENTOUT 0x8f10
> -#define STM32F429_PI15_FUNC_ANALOG 0x8f11
> -
> -
> -
> -#define STM32F429_PJ0_FUNC_GPIO 0x9000
> -#define STM32F429_PJ0_FUNC_LCD_R1 0x900f
> -#define STM32F429_PJ0_FUNC_EVENTOUT 0x9010
> -#define STM32F429_PJ0_FUNC_ANALOG 0x9011
> -
> -#define STM32F429_PJ1_FUNC_GPIO 0x9100
> -#define STM32F429_PJ1_FUNC_LCD_R2 0x910f
> -#define STM32F429_PJ1_FUNC_EVENTOUT 0x9110
> -#define STM32F429_PJ1_FUNC_ANALOG 0x9111
> -
> -#define STM32F429_PJ2_FUNC_GPIO 0x9200
> -#define STM32F429_PJ2_FUNC_LCD_R3 0x920f
> -#define STM32F429_PJ2_FUNC_EVENTOUT 0x9210
> -#define STM32F429_PJ2_FUNC_ANALOG 0x9211
> -
> -#define STM32F429_PJ3_FUNC_GPIO 0x9300
> -#define STM32F429_PJ3_FUNC_LCD_R4 0x930f
> -#define STM32F429_PJ3_FUNC_EVENTOUT 0x9310
> -#define STM32F429_PJ3_FUNC_ANALOG 0x9311
> -
> -#define STM32F429_PJ4_FUNC_GPIO 0x9400
> -#define STM32F429_PJ4_FUNC_LCD_R5 0x940f
> -#define STM32F429_PJ4_FUNC_EVENTOUT 0x9410
> -#define STM32F429_PJ4_FUNC_ANALOG 0x9411
> -
> -#define STM32F429_PJ5_FUNC_GPIO 0x9500
> -#define STM32F429_PJ5_FUNC_LCD_R6 0x950f
> -#define STM32F429_PJ5_FUNC_EVENTOUT 0x9510
> -#define STM32F429_PJ5_FUNC_ANALOG 0x9511
> -
> -#define STM32F429_PJ6_FUNC_GPIO 0x9600
> -#define STM32F429_PJ6_FUNC_LCD_R7 0x960f
> -#define STM32F429_PJ6_FUNC_EVENTOUT 0x9610
> -#define STM32F429_PJ6_FUNC_ANALOG 0x9611
> -
> -#define STM32F429_PJ7_FUNC_GPIO 0x9700
> -#define STM32F429_PJ7_FUNC_LCD_G0 0x970f
> -#define STM32F429_PJ7_FUNC_EVENTOUT 0x9710
> -#define STM32F429_PJ7_FUNC_ANALOG 0x9711
> -
> -#define STM32F429_PJ8_FUNC_GPIO 0x9800
> -#define STM32F429_PJ8_FUNC_LCD_G1 0x980f
> -#define STM32F429_PJ8_FUNC_EVENTOUT 0x9810
> -#define STM32F429_PJ8_FUNC_ANALOG 0x9811
> -
> -#define STM32F429_PJ9_FUNC_GPIO 0x9900
> -#define STM32F429_PJ9_FUNC_LCD_G2 0x990f
> -#define STM32F429_PJ9_FUNC_EVENTOUT 0x9910
> -#define STM32F429_PJ9_FUNC_ANALOG 0x9911
> -
> -#define STM32F429_PJ10_FUNC_GPIO 0x9a00
> -#define STM32F429_PJ10_FUNC_LCD_G3 0x9a0f
> -#define STM32F429_PJ10_FUNC_EVENTOUT 0x9a10
> -#define STM32F429_PJ10_FUNC_ANALOG 0x9a11
> -
> -#define STM32F429_PJ11_FUNC_GPIO 0x9b00
> -#define STM32F429_PJ11_FUNC_LCD_G4 0x9b0f
> -#define STM32F429_PJ11_FUNC_EVENTOUT 0x9b10
> -#define STM32F429_PJ11_FUNC_ANALOG 0x9b11
> -
> -#define STM32F429_PJ12_FUNC_GPIO 0x9c00
> -#define STM32F429_PJ12_FUNC_LCD_B0 0x9c0f
> -#define STM32F429_PJ12_FUNC_EVENTOUT 0x9c10
> -#define STM32F429_PJ12_FUNC_ANALOG 0x9c11
> -
> -#define STM32F429_PJ13_FUNC_GPIO 0x9d00
> -#define STM32F429_PJ13_FUNC_LCD_B1 0x9d0f
> -#define STM32F429_PJ13_FUNC_EVENTOUT 0x9d10
> -#define STM32F429_PJ13_FUNC_ANALOG 0x9d11
> -
> -#define STM32F429_PJ14_FUNC_GPIO 0x9e00
> -#define STM32F429_PJ14_FUNC_LCD_B2 0x9e0f
> -#define STM32F429_PJ14_FUNC_EVENTOUT 0x9e10
> -#define STM32F429_PJ14_FUNC_ANALOG 0x9e11
> -
> -#define STM32F429_PJ15_FUNC_GPIO 0x9f00
> -#define STM32F429_PJ15_FUNC_LCD_B3 0x9f0f
> -#define STM32F429_PJ15_FUNC_EVENTOUT 0x9f10
> -#define STM32F429_PJ15_FUNC_ANALOG 0x9f11
> -
> -
> -
> -#define STM32F429_PK0_FUNC_GPIO 0xa000
> -#define STM32F429_PK0_FUNC_LCD_G5 0xa00f
> -#define STM32F429_PK0_FUNC_EVENTOUT 0xa010
> -#define STM32F429_PK0_FUNC_ANALOG 0xa011
> -
> -#define STM32F429_PK1_FUNC_GPIO 0xa100
> -#define STM32F429_PK1_FUNC_LCD_G6 0xa10f
> -#define STM32F429_PK1_FUNC_EVENTOUT 0xa110
> -#define STM32F429_PK1_FUNC_ANALOG 0xa111
> -
> -#define STM32F429_PK2_FUNC_GPIO 0xa200
> -#define STM32F429_PK2_FUNC_LCD_G7 0xa20f
> -#define STM32F429_PK2_FUNC_EVENTOUT 0xa210
> -#define STM32F429_PK2_FUNC_ANALOG 0xa211
> -
> -#define STM32F429_PK3_FUNC_GPIO 0xa300
> -#define STM32F429_PK3_FUNC_LCD_B4 0xa30f
> -#define STM32F429_PK3_FUNC_EVENTOUT 0xa310
> -#define STM32F429_PK3_FUNC_ANALOG 0xa311
> -
> -#define STM32F429_PK4_FUNC_GPIO 0xa400
> -#define STM32F429_PK4_FUNC_LCD_B5 0xa40f
> -#define STM32F429_PK4_FUNC_EVENTOUT 0xa410
> -#define STM32F429_PK4_FUNC_ANALOG 0xa411
> -
> -#define STM32F429_PK5_FUNC_GPIO 0xa500
> -#define STM32F429_PK5_FUNC_LCD_B6 0xa50f
> -#define STM32F429_PK5_FUNC_EVENTOUT 0xa510
> -#define STM32F429_PK5_FUNC_ANALOG 0xa511
> -
> -#define STM32F429_PK6_FUNC_GPIO 0xa600
> -#define STM32F429_PK6_FUNC_LCD_B7 0xa60f
> -#define STM32F429_PK6_FUNC_EVENTOUT 0xa610
> -#define STM32F429_PK6_FUNC_ANALOG 0xa611
> -
> -#define STM32F429_PK7_FUNC_GPIO 0xa700
> -#define STM32F429_PK7_FUNC_LCD_DE 0xa70f
> -#define STM32F429_PK7_FUNC_EVENTOUT 0xa710
> -#define STM32F429_PK7_FUNC_ANALOG 0xa711
> -
> -#endif /* _DT_BINDINGS_STM32F429_PINFUNC_H */
>
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