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Date:   Wed, 19 Jul 2017 17:31:26 +0200
From:   Gregory CLEMENT <gregory.clement@...e-electrons.com>
To:     Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Jason Cooper <jason@...edaemon.net>,
        Andrew Lunn <andrew@...n.ch>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Gregory CLEMENT <gregory.clement@...e-electrons.com>
Cc:     Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
        linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        linux-arm-kernel@...ts.infradead.org,
        Antoine Tenart <antoine.tenart@...e-electrons.com>,
        Miquèl Raynal <miquel.raynal@...e-electrons.com>,
        Nadav Haklai <nadavh@...vell.com>,
        Shadi Ammouri <shadi@...vell.com>,
        Yehuda Yitschak <yehuday@...vell.com>,
        Omri Itach <omrii@...vell.com>,
        Hanna Hawa <hannah@...vell.com>,
        Igal Liberman <igall@...vell.com>,
        Marcin Wojtas <mw@...ihalf.com>
Subject: [PATCH 2/2] ARM64: dts: marvell: add NAND support on the CP110 master

The NAND controller used in A7K/A8K is present on the CP110 master
part. It is compatible with the pxa-nand driver.

Unlike most of the controller on the CP110 this one is only present on
the master for the Armada 8K SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@...e-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 726528ce54e9..9be4a442ded5 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -240,6 +240,20 @@
 				status = "disabled";
 			};
 
+			cpm_nand: nand@...000 {
+				/*
+				 * For A7K/A8K this controller is only
+				 * present on the CPM and not on the CPS
+				 */
+				compatible = "marvell,armada370-nand";
+				reg = <0x720000 0x54>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&cpm_clk 1 2>;
+				status = "disabled";
+			};
+
 			cpm_trng: trng@...000 {
 				compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
 				reg = <0x760000 0x7d>;
-- 
2.13.2

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