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Message-ID: <20170720140027.GR18556@csclub.uwaterloo.ca>
Date: Thu, 20 Jul 2017 10:00:27 -0400
From: lsorense@...lub.uwaterloo.ca (Lennart Sorensen)
To: Benjamin Poirier <bpoirier@...e.com>
Cc: linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
intel-wired-lan@...ts.osuosl.org,
Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Subject: Re: commit 16ecba59 breaks 82574L under heavy load.
On Wed, Jul 19, 2017 at 05:07:47PM -0700, Benjamin Poirier wrote:
> Are you sure about this? In my testing, while triggering the overrun
> with the msleep, I read ICR when entering e1000_msix_other() and RXO is
> consistently set.
I had thousands of calls to e1000_msix_other where the only bit set
was OTHER.
I don't know if the cause is overruns, it just seems plausible.
> I'm working on a patch that uses that fact to handle the situation and
> limit the interrupt.
Excellent.
Running in MSI mode rather than MSI-X seems to not have the problem of
unexpected interrupts, but has other issues (such as loosing the IRQ
affinity setting if you do ifconfig down;ifconfig up on the interface,
which does not happen in MSI-X's case.) That's rather annoying as you
can't set the affinity before bringing up the interface which is rather
undesirable.
--
Len Sorensen
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