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Message-ID: <87mv7ye1sg.fsf@concordia.ellerman.id.au>
Date:   Fri, 21 Jul 2017 16:34:23 +1000
From:   Michael Ellerman <mpe@...erman.id.au>
To:     Zhao Qiang <qiang.zhao@....com>, oss@...error.net
Cc:     valentin.longchamp@...mile.com, linuxppc-dev@...ts.ozlabs.org,
        linux-kernel@...r.kernel.org, Zhao Qiang <qiang.zhao@....com>
Subject: Re: [PATCH] qe: fix compile issue for arm64

Zhao Qiang <qiang.zhao@....com> writes:

> Signed-off-by: Zhao Qiang <qiang.zhao@....com>
> ---
>  drivers/soc/fsl/qe/qe.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
> index 2ef6fc6..d48fa4a 100644
> --- a/drivers/soc/fsl/qe/qe.c
> +++ b/drivers/soc/fsl/qe/qe.c
> @@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
>  	/* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
>  	   that the BRG divisor must be even if you're not using divide-by-16
>  	   mode. */
> +#ifdef CONFIG_PPC
>  	if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))
> +#endif
>  		if (!div16 && (divisor & 1) && (divisor > 3))
>  			divisor++;

Are you sure that's what you want to do on arm64 ?

cheers

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