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Message-ID: <20170724122327.z6p4w5yvirnbuvfd@hirez.programming.kicks-ass.net>
Date: Mon, 24 Jul 2017 14:23:27 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Michael Ellerman <mpe@...erman.id.au>
Cc: Kees Cook <keescook@...omium.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Ingo Molnar <mingo@...nel.org>,
Josh Poimboeuf <jpoimboe@...hat.com>,
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Hans Liljestrand <ishkamiel@...il.com>,
Greg KH <gregkh@...uxfoundation.org>,
Alexey Dobriyan <adobriyan@...il.com>,
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<kernel-hardening@...ts.openwall.com>
Subject: Re: [PATCH v6 0/2] x86: Implement fast refcount overflow protection
On Mon, Jul 24, 2017 at 10:09:32PM +1000, Michael Ellerman wrote:
> Peter Zijlstra <peterz@...radead.org> writes:
> > anyway, and the fact that your LL/SC is horrendously slow in any case.
>
> Boo :/
:-)
> Just kidding. I suspect you're right that we can probably pack a
> reasonable amount of tests in the body of the LL/SC and not notice.
>
> > Also, I still haven't seen an actual benchmark where our cmpxchg loop
> > actually regresses anything, just a lot of yelling about potential
> > regressions :/
>
> Heh yeah. Though I have looked at the code it generates on PPC and it's
> not sleek, though I guess that's not a benchmark is it :)
Oh for sure, GCC still can't sanely convert a cmpxchg loop (esp. if the
cmpxchg is implemented using asm) into a native LL/SC sequence, so the
generic code will end up looking pretty horrendous.
A native implementation of the same semantics should look loads better.
One thing that might help you is that refcount_dec_and_test() is weaker
than atomic_dec_and_test() wrt ordering, so that might help some
(RELEASE vs fully ordered).
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