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Message-Id: <20170724133540.32200-4-ricardo.ribalda@gmail.com>
Date: Mon, 24 Jul 2017 15:35:29 +0200
From: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
To: Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
David Airlie <airlied@...ux.ie>, Rex Zhu <Rex.Zhu@....com>,
Tom St Denis <tom.stdenis@....com>,
Eric Huang <JinHuiEric.Huang@....com>,
Huang Rui <ray.huang@....com>,
Dan Carpenter <dan.carpenter@...cle.com>,
"Edward O'Callaghan" <funfunctor@...klore1984.net>,
Kees Cook <keescook@...omium.org>,
"Andrew F. Davis" <afd@...com>,
Hawking Zhang <Hawking.Zhang@....com>,
Baoyou Xie <baoyou.xie@...aro.org>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Colin Ian King <colin.king@...onical.com>,
Nils Wallménius <nils.wallmenius@...il.com>,
Joe Perches <joe@...ches.com>, amd-gfx@...ts.freedesktop.org,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Cc: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
Subject: [PATCH 03/14] amdgpu: powerplay: cz_hwmgr: Fix invalid error message.
display_config is never set, therefore we can assume it is zero.
Without this fix, the user will get the following invalid warning on its
dmesg:
amdgpu: [powerplay] min_core_set_clock not set.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 20 ++++++--------------
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 0b74da3dca8b..418f6bf33bb5 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -720,12 +720,8 @@ static int cz_tf_update_sclk_limit(struct pp_hwmgr *hwmgr,
else
cz_hwmgr->sclk_dpm.soft_max_clk = table->entries[table->count - 1].clk;
- clock = hwmgr->display_config.min_core_set_clock;
- if (clock == 0)
- pr_info("min_core_set_clock not set\n");
-
- if (cz_hwmgr->sclk_dpm.hard_min_clk != clock) {
- cz_hwmgr->sclk_dpm.hard_min_clk = clock;
+ if (cz_hwmgr->sclk_dpm.hard_min_clk) {
+ cz_hwmgr->sclk_dpm.hard_min_clk = 0;
smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
PPSMC_MSG_SetSclkHardMin,
@@ -780,15 +776,13 @@ static int cz_tf_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr,
{
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SclkDeepSleep)) {
- uint32_t clks = hwmgr->display_config.min_core_set_clock_in_sr;
- if (clks == 0)
- clks = CZ_MIN_DEEP_SLEEP_SCLK;
- PP_DBG_LOG("Setting Deep Sleep Clock: %d\n", clks);
+ PP_DBG_LOG("Setting Deep Sleep Clock: %d\n",
+ CZ_MIN_DEEP_SLEEP_SCLK);
smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
PPSMC_MSG_SetMinDeepSleepSclk,
- clks);
+ CZ_MIN_DEEP_SLEEP_SCLK);
}
return 0;
@@ -1120,9 +1114,7 @@ static int cz_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
cz_hwmgr->battery_state = (PP_StateUILabel_Battery == prequest_ps->classification.ui_label);
- clocks.memoryClock = hwmgr->display_config.min_mem_set_clock != 0 ?
- hwmgr->display_config.min_mem_set_clock :
- cz_hwmgr->sys_info.nbp_memory_clock[1];
+ clocks.memoryClock = cz_hwmgr->sys_info.nbp_memory_clock[1];
cgs_get_active_displays_info(hwmgr->device, &info);
num_of_active_displays = info.display_count;
--
2.13.2
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