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Date:   Mon, 24 Jul 2017 15:35:36 +0200
From:   Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
To:     Alex Deucher <alexander.deucher@....com>,
        Christian König <christian.koenig@....com>,
        David Airlie <airlied@...ux.ie>, Rex Zhu <Rex.Zhu@....com>,
        Tom St Denis <tom.stdenis@....com>,
        Eric Huang <JinHuiEric.Huang@....com>,
        Huang Rui <ray.huang@....com>,
        Dan Carpenter <dan.carpenter@...cle.com>,
        "Edward O'Callaghan" <funfunctor@...klore1984.net>,
        Kees Cook <keescook@...omium.org>,
        "Andrew F. Davis" <afd@...com>,
        Hawking Zhang <Hawking.Zhang@....com>,
        Baoyou Xie <baoyou.xie@...aro.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Colin Ian King <colin.king@...onical.com>,
        Nils Wallménius <nils.wallmenius@...il.com>,
        Joe Perches <joe@...ches.com>, amd-gfx@...ts.freedesktop.org,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Cc:     Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
Subject: [PATCH 10/14] amdgpu: powerplay: vega10_hwmgr: Assume display_config is zero

display_config is never set, so we can assume that it is zero

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 19 ++++++-------------
 1 file changed, 6 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index d6f097f44b6c..dd73ab7e5cfe 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -3044,8 +3044,6 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
 	cgs_get_active_displays_info(hwmgr->device, &info);
 
 	/* result = PHM_CheckVBlankTime(hwmgr, &vblankTooShort);*/
-	minimum_clocks.engineClock = hwmgr->display_config.min_core_set_clock;
-	minimum_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock;
 
 	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
 			PHM_PlatformCaps_StablePState)) {
@@ -4000,10 +3998,6 @@ static int vega10_notify_smc_display_config_after_ps_adjustment(
 	else
 		vega10_notify_smc_display_change(hwmgr, true);
 
-	min_clocks.dcefClock = hwmgr->display_config.min_dcef_set_clk;
-	min_clocks.dcefClockInSR = hwmgr->display_config.min_dcef_deep_sleep_set_clk;
-	min_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock;
-
 	for (i = 0; i < dpm_table->count; i++) {
 		if (dpm_table->dpm_levels[i].value == min_clocks.dcefClock)
 			break;
@@ -4634,20 +4628,19 @@ static bool
 vega10_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
 {
 	struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
-	bool is_update_required = false;
 	struct cgs_display_info info = {0, 0, NULL};
 
 	cgs_get_active_displays_info(hwmgr->device, &info);
 
 	if (data->display_timing.num_existing_displays != info.display_count)
-		is_update_required = true;
+		return true;
 
-	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
-		if (data->display_timing.min_clock_in_sr != hwmgr->display_config.min_core_set_clock_in_sr)
-			is_update_required = true;
-	}
+	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+			    PHM_PlatformCaps_SclkDeepSleep) &&
+	    data->display_timing.min_clock_in_sr)
+		return true;
 
-	return is_update_required;
+	return false;
 }
 
 static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
-- 
2.13.2

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