linux-kernel - [PATCH 07/14] amdgpu: powerplay: polaris10_smc: Assume display

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Message-Id: <20170724133540.32200-8-ricardo.ribalda@gmail.com>
Date:   Mon, 24 Jul 2017 15:35:33 +0200
From:   Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
To:     Alex Deucher <alexander.deucher@....com>,
        Christian König <christian.koenig@....com>,
        David Airlie <airlied@...ux.ie>, Rex Zhu <Rex.Zhu@....com>,
        Tom St Denis <tom.stdenis@....com>,
        Eric Huang <JinHuiEric.Huang@....com>,
        Huang Rui <ray.huang@....com>,
        Dan Carpenter <dan.carpenter@...cle.com>,
        "Edward O'Callaghan" <funfunctor@...klore1984.net>,
        Kees Cook <keescook@...omium.org>,
        "Andrew F. Davis" <afd@...com>,
        Hawking Zhang <Hawking.Zhang@....com>,
        Baoyou Xie <baoyou.xie@...aro.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Colin Ian King <colin.king@...onical.com>,
        Nils Wallménius <nils.wallmenius@...il.com>,
        Joe Perches <joe@...ches.com>, amd-gfx@...ts.freedesktop.org,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Cc:     Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
Subject: [PATCH 07/14] amdgpu: powerplay: polaris10_smc: Assume display_config is zero

display_config is never set, we can assume it is zero.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
index f68e759e8be2..c889fc930cfc 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
@@ -711,11 +711,12 @@ static int polaris10_populate_single_graphic_level(struct pp_hwmgr *hwmgr,
 	level->DownHyst = 0;
 	level->VoltageDownHyst = 0;
 	level->PowerThrottle = 0;
-	data->display_timing.min_clock_in_sr = hwmgr->display_config.min_core_set_clock_in_sr;
+	data->display_timing.min_clock_in_sr = 0;
 
-	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep))
-		level->DeepSleepDivId = smu7_get_sleep_divider_id_from_clock(clock,
-								hwmgr->display_config.min_core_set_clock_in_sr);
+	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+			    PHM_PlatformCaps_SclkDeepSleep))
+		level->DeepSleepDivId =
+			smu7_get_sleep_divider_id_from_clock(clock, 0);
 
 	/* Default to slow, highest DPM level will be
 	 * set to PPSMC_DISPLAY_WATERMARK_LOW later.
-- 
2.13.2