linux-kernel - Re: [PATCH V2 1/2] pinctrl: qcom: spmi-gpio: Add support for GPIO LV/MV subtype

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 24 Jul 2017 14:07:18 -0500
From:   Rob Herring <robh@...nel.org>
To:     fenglinw@...eaurora.org
Cc:     linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        bjorn.andersson@...aro.org,
        Linus Walleij <linus.walleij@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        Andy Gross <andy.gross@...aro.org>,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        collinsd@...eaurora.org, aghayal@...eaurora.org,
        wruan@...eaurora.org, kgunda@...eaurora.org
Subject: Re: [PATCH V2 1/2] pinctrl: qcom: spmi-gpio: Add support for GPIO
 LV/MV subtype

On Wed, Jul 19, 2017 at 02:30:45PM +0800, fenglinw@...eaurora.org wrote:
> From: Fenglin Wu <fenglinw@...eaurora.org>
> 
> GPIO LV (low voltage)/MV (medium voltage) subtypes have different
> features and register mappings than 4CH/8CH subtypes. Add support
> for LV and MV subtypes.
> 
> Signed-off-by: Fenglin Wu <fenglinw@...eaurora.org>
> ---
>  .../devicetree/bindings/pinctrl/qcom,pmic-gpio.txt |  17 +-

Acked-by: Rob Herring <robh@...nel.org>

>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c           | 281 +++++++++++++++++----
>  include/dt-bindings/pinctrl/qcom,pmic-gpio.h       |   2 +
>  3 files changed, 250 insertions(+), 50 deletions(-)