[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170725073311.kyfsvf4xzrzlhgp5@flea>
Date: Tue, 25 Jul 2017 09:33:11 +0200
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Chen-Yu Tsai <wens@...e.org>
Cc: Ulf Hansson <ulf.hansson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-kernel@...ts.infradead.org, linux-mmc@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [PATCH v3 03/10] clk: sunxi-ng: a83t: Support new timing mode
for mmc2 clock
On Mon, Jul 24, 2017 at 09:58:58PM +0800, Chen-Yu Tsai wrote:
> The MMC2 clock supports a new timing mode. When the new mode is active,
> the output clock rate is halved.
>
> This patch sets the feature flag for the new timing mode, and adds
> a pre-divider based on the mode bit.
>
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>
Acked-by: Maxime Ripard <maxime.ripard@...e-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Download attachment "signature.asc" of type "application/pgp-signature" (802 bytes)
Powered by blists - more mailing lists