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Message-Id: <20170726060527.GD3218@osiris>
Date:   Wed, 26 Jul 2017 08:05:27 +0200
From:   Heiko Carstens <heiko.carstens@...ibm.com>
To:     Martin Schwidefsky <schwidefsky@...ibm.com>
Cc:     Guenter Roeck <linux@...ck-us.net>, linux-kernel@...r.kernel.org,
        linux-s390@...r.kernel.org
Subject: Re: Qemu problems in -next with 's390/spinlock: add niai spinlock
 hints'

On Wed, Jul 26, 2017 at 07:40:44AM +0200, Martin Schwidefsky wrote:
> On Wed, 26 Jul 2017 07:00:33 +0200
> Heiko Carstens <heiko.carstens@...ibm.com> wrote:
> 
> > On Tue, Jul 25, 2017 at 06:14:51PM -0700, Guenter Roeck wrote:
> > > Hi Martin,
> > > 
> > > my s390 qemu tests in linux-next stopped working a few days ago.
> > > Bisect points to commit 's390/spinlock: add niai spinlock hints'.
> > > 
> > > Looking at the patch, this isn't really surprising; at least to me it looks
> > > like the patch is making instructions mandatory which are only available in
> > > Z14 CPUs. Does this mean that older s390 CPUs (such as the Z900 used in my
> > > qemu tests) are no longer going to be supported in Linux ?  
> > 
> > No, that means that the patch has a bug. The NIAI instruction is only
> > available if the execution-hint facility is installed. That facility came
> > with zEC12. Luckily it uses the same facility indicator bit like the
> > miscellaneous-instruction-extensions facility, which we already use anyway
> > if the kernel gets compiled for zEC12. In that case we have early code
> > which verifies if all required facilities to run the kernel are installed,
> > and if not it will print a message to the console and stop the machine.
> > 
> > So the easiest fix would be to generate the NIAI instruction only if the
> > kernel gets compiled for zEC12 or newer.
> 
> Hmm, I though that NIAI is a NOP on older machines. A runtime check for
> the facility bit is out of the question as the NIAI-7 gets inlined in
> the spin_unlock code. So yes, the only available fix is to make the
> NIAI hinting conditional on zEC12. Which is quite ugly as we would need
> an architecture level set to zEC12 for the distribution kernel to make
> use of NIAI.

Alternatively you could generate a four-byte nop, and replace that at IPL
time with the needed NIAI instruction, if the facility is available. Some
sort of "alternative" code patching infrastructure that x86 already has.
Not sure if it is worth it, however...

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