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Message-ID: <20170726025717.lob7jlrb6ipa6rel@latitude>
Date: Wed, 26 Jul 2017 04:57:17 +0200
From: Jonathan Neuschäfer <j.neuschaefer@....net>
To: patches@...ups.riscv.org
Cc: Olof Johansson <olof@...om.net>, Arnd Bergmann <arnd@...db.de>,
akpm@...ux-foundation.org, albert@...ive.com,
yamada.masahiro@...ionext.com, mmarek@...e.com,
will.deacon@....com, peterz@...radead.org, boqun.feng@...il.com,
mingo@...hat.com, daniel.lezcano@...aro.org, tglx@...utronix.de,
jason@...edaemon.net, marc.zyngier@....com,
gregkh@...uxfoundation.org, jslaby@...e.com, davem@...emloft.net,
mchehab@...nel.org, sfr@...b.auug.org.au, fweisbec@...il.com,
viro@...iv.linux.org.uk, mcgrof@...nel.org, dledford@...hat.com,
bart.vanassche@...disk.com, sstabellini@...nel.org,
daniel.vetter@...ll.ch, mpe@...erman.id.au, msalter@...hat.com,
nicolas.dichtel@...nd.com, james.hogan@...tec.com,
paul.gortmaker@...driver.com, linux@...ck-us.net,
heiko.carstens@...ibm.com, schwidefsky@...ibm.com,
linux-kernel@...r.kernel.org, Palmer Dabbelt <palmer@...belt.com>
Subject: Re: [patches] [PATCH 17/17] RISC-V: Build Infastructure
On Tue, Jul 11, 2017 at 06:31:30PM -0700, Palmer Dabbelt wrote:
> This patch contains all the build infastructure that actually enables
> the RISC-V port. This includes Makefiles, linker scripts, and Kconfig
> files. It also contains the only top-level change, which adds RISC-V to
> the list of architectures that need a sed run to produce the ARCH
> variable when building locally.
>
> Signed-off-by: Palmer Dabbelt <palmer@...belt.com>
> ---
[...]
> +config ISA_C
> + bool "Emit compressed instructions when building Linux"
As a user, I'd prefer to have slightly more globally-recognisable names
than ISA_<single letter> for RISC-V instruction set architecture
extensions. A quick "git grep -A2 'config ISA'" shows the following
Kconfig symbols:
* ISA, ISA_BUS_API, ISA_DMA_API, ISAPNP:
Settings related to the historic ISA bus.
* ISA_ARCOMPACT/ISA_ARCV2 (arch/arc),
ISA_M32R/ISA_M32R2/ISA_DSP_LEVEL2/ISA_DUAL_ISSUE (arch/m32r):
Instruction set options.
Four out of the six instruction set options have ARC/M32R in the name,
and I think that makes things slightly more readable. Therefore I
humbly propose something longer, and with a hint of RISC-V in the name,
such as ISA_RVC.
(Take this with a grain of salt, perhaps.)
Jonathan Neuschäfer
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