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Message-ID: <1501299671.12447.4.camel@mtkswgap22>
Date: Sat, 29 Jul 2017 11:41:11 +0800
From: Ryder Lee <ryder.lee@...iatek.com>
To: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
CC: Hans de Goede <hdegoede@...hat.com>, Tejun Heo <tj@...nel.org>,
"Rob Herring" <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-ide@...r.kernel.org>,
Long Cheng <long.cheng@...iatek.com>
Subject: Re: [PATCH 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA
controller
On Fri, 2017-07-28 at 12:20 +0300, Sergei Shtylyov wrote:
> > +Required properties:
> > + - compatible : Must be "mediatek,ahci".
> > + - reg : Physical base addresses and length of register sets.
> > + - interrupts : Interrupt associated with the SATA device.
> > + - interrupt-names : Associated name must be: "hostc".
> > + - clocks : The phandle for the clock.
>
> Your example shows that you need both phandle and specifier (afetr phandle).
>
> > + - clock-names : Associated name must be: "ahb", "axi", "asic", "rbc", "pm"
> > + - phys : The phandle for the PHY port.
>
> Likewise.
Oh yeah, I forgot about that.
> > + - phy-names : Associated name must be: "sata-phy".
> > + - ports-implemented : Mask that indicates which ports that the HBA supports
> > + are available for software to use. Useful if PORTS_IMPL
> > + is not programmed by the BIOS, which is true with some
> > + embedded SOC's.
>
> An empty line wouldn't hurt here...
Okay.
> > +Optional properties:
> > + - power-domains : A phandle and power domain specifier pair to the power
> > + domain which is responsible for collapsing and restoring
> > + power to the peripheral.
> > + - resets : Must contain an entry for each entry in reset-names.
> > + See ../reset/reset.txt for details.
> > + - reset-names : Associated names must be: "axi-rst", "sw-rst", "reg-rst".
> > + - mediatek,phy-mode : A phandle to the system controller, used to enable
> > + SATA function.
Thanks!
Ryder.
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