linux-kernel - Re: [RFC][PATCH]: x86: clarify/fix no-op barriers for text_poke

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Date:   Mon, 31 Jul 2017 10:23:23 -0400
From:   Steven Rostedt <rostedt@...dmis.org>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     jkosina@...e.cz, masami.hiramatsu.pt@...achi.com,
        hpa@...ux.intel.com, linux-kernel@...r.kernel.org, x86@...nel.org
Subject: Re: [RFC][PATCH]: x86: clarify/fix no-op barriers for
 text_poke_bp()

On Mon, 31 Jul 2017 12:21:54 +0200
Peter Zijlstra <peterz@...radead.org> wrote:

> So I was looking at text_poke_bp() today and I couldn't make sense of
> the barriers there.
> 
> How's for something like so?
> 
> ---
>  arch/x86/kernel/alternative.c | 22 ++++++++++++++++------
>  1 file changed, 16 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
> index 32e14d137416..3344d3382e91 100644
> --- a/arch/x86/kernel/alternative.c
> +++ b/arch/x86/kernel/alternative.c
> @@ -742,7 +742,16 @@ static void *bp_int3_handler, *bp_int3_addr;
>  
>  int poke_int3_handler(struct pt_regs *regs)
>  {
> -	/* bp_patching_in_progress */
> +	/*
> +	 * Having observed our INT3 instruction, we now must observe
> +	 * bp_patching_in_progress.
> +	 *
> +	 * 	in_progress = TRUE		INT3
> +	 * 	WMB				RMB
> +	 * 	write INT3			if (in_progress)
> +	 *
> +	 * Idem for bp_int3_handler.
> +	 */

Looks correct.

>  	smp_rmb();
>  
>  	if (likely(!bp_patching_in_progress))
> @@ -788,9 +797,8 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler)
>  	bp_int3_addr = (u8 *)addr + sizeof(int3);
>  	bp_patching_in_progress = true;
>  	/*
> -	 * Corresponding read barrier in int3 notifier for
> -	 * making sure the in_progress flags is correctly ordered wrt.
> -	 * patching
> +	 * Corresponding read barrier in int3 notifier for making sure the
> +	 * in_progress and handler are correctly ordered wrt. patching.
>  	 */

This looks correct as well.

>  	smp_wmb();
>  
> @@ -815,9 +823,11 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler)
>  	text_poke(addr, opcode, sizeof(int3));
>  
>  	on_each_cpu(do_sync_core, NULL, 1);
> -
> +	/*
> +	 * sync_core() implies an smp_mb() and orders this store against
> +	 * the writing of the new instruction.
> +	 */

Yep.

>  	bp_patching_in_progress = false;
> -	smp_wmb();

Heh, I think this was a "lets not leak bp_patching_in_progress" out of
this function. But I don't see any harm if it happens.

As this function was a *very* slow path, that smp_wmb() was a "it's not
really needed, but it wont hurt anything to slap it in there just in
case".


Reviewed-by: Steven Rostedt (VMware) <rostedt@...dmis.org>

-- Steve

>  
>  	return addr;
>  }