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Message-ID: <20170801045434.8733-5-vigneshr@ti.com>
Date: Tue, 1 Aug 2017 10:24:31 +0530
From: Vignesh R <vigneshr@...com>
To: Marek Vasut <marek.vasut@...il.com>,
Cyrille Pitchen <cyrille.pitchen@...ev4u.fr>,
Rob Herring <robh+dt@...nel.org>,
Santosh Shilimkar <ssantosh@...nel.org>
CC: David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
<linux-mtd@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, Vignesh R <vigneshr@...com>
Subject: [PATCH 4/7] ARM: dts: keystone-k2g: Add QSPI DT entry
Add DT node for Cadence QSPI IP present in 66AK2G SoC.
Signed-off-by: Vignesh R <vigneshr@...com>
---
arch/arm/boot/dts/keystone-k2g.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi
index bf4d1fa30840..95327aabfaa4 100644
--- a/arch/arm/boot/dts/keystone-k2g.dtsi
+++ b/arch/arm/boot/dts/keystone-k2g.dtsi
@@ -168,5 +168,20 @@
#reset-cells = <2>;
};
};
+
+ qspi: qspi@...0000 {
+ compatible = "ti,k2g-qspi", "cdns,qspi-nor";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x02940000 0x1000>,
+ <0x24000000 0x4000000>;
+ interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
+ cdns,fifo-depth = <256>;
+ cdns,fifo-width = <4>;
+ cdns,trigger-address = <0x24000000>;
+ clocks = <&k2g_clks 0x43 0x0>;
+ power-domains = <&k2g_pds 0x43>;
+ status = "disabled";
+ };
};
};
--
2.13.3
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