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Message-ID: <1501577481.32089.3.camel@mtksdaap41>
Date: Tue, 1 Aug 2017 16:51:21 +0800
From: Yingjoe Chen <yingjoe.chen@...iatek.com>
To: YT Shen <yt.shen@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
<devicetree@...r.kernel.org>, Jason Cooper <jason@...edaemon.net>,
<srv_heupstream@...iatek.com>, Marc Zyngier <marc.zyngier@....com>,
"Catalin Marinas" <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
<linux-kernel@...r.kernel.org>,
Mars Cheng <mars.cheng@...iatek.com>,
<linux-serial@...r.kernel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
<linux-mediatek@...ts.infradead.org>,
"Thomas Gleixner" <tglx@...utronix.de>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v5 2/2] arm64: dts: Add Mediatek SoC MT2712 and
evaluation board dts and Makefile
On Fri, 2017-07-28 at 19:37 +0800, YT Shen wrote:
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> new file mode 100644
> index 0000000..1e135af
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
<...>
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "simple-bus";
> + ranges;
Matthias,
I notice this have soc node.
Do we need to get rid of it?
Joe.C
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