lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170801133145.mqfen3bskzwwabwp@linux.intel.com>
Date:   Tue, 1 Aug 2017 16:31:45 +0300
From:   Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>
To:     Michal Suchánek <msuchanek@...e.de>
Cc:     James Bottomley <jejb@...ux.vnet.ibm.com>,
        Christophe Ricard <christophe.ricard@...il.com>,
        linux-kernel@...r.kernel.org, tpmdd-devel@...ts.sourceforge.net,
        apronin@...omium.org
Subject: Re: [tpmdd-devel] tpm: read burstcount from TPM_STS in one 32-bit
 transaction

On Tue, Jul 25, 2017 at 08:17:58PM +0200, Michal Suchánek wrote:
> On Tue, 25 Jul 2017 10:36:11 -0700
> James Bottomley <jejb@...ux.vnet.ibm.com> wrote:
> 
> > On Tue, 2017-07-25 at 15:04 +0200, Michal Suchánek wrote:
> > > Hello,
> > > 
> > > in commit 9754d45e9970 ("tpm: read burstcount from TPM_STS in one
> > > 32-bit transaction") you change reading of two 8-bit values to one
> > > 32bit read. This is obviously wrong wrt endianess unless the
> > > underlying tpm_tis_read32 does endian conversion.   
> > 
> > Some of the bus read primitives do do endianness conversions.  The
> > problem is with the SPI attachment, which has unclear endianness.  A
> > standard PCI bus attachment uses ioread32() which automatically
> > transforms from a little endian bus to the cpu endianness, however SPI
> > is forced to transfer the bytes one at a time over the serial bus and
> > then transform.  The assumption seems to be that the TIS TPM is
> > replying in little endian format when SPI connected.
> > 
> 
> Yes, that makes sense.
> 
> Thanks for clarification.
> 
> Michal

Thank you for reporting this and thanks James for explaining this.

I do not have access to PPC hardware with SPI-TPM.

/Jarkko

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ