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Message-ID: <71a0632d-913e-d56a-037c-9990394b761f@infradead.org>
Date: Tue, 1 Aug 2017 08:20:02 -0700
From: Randy Dunlap <rdunlap@...radead.org>
To: Palmer Dabbelt <palmer@...belt.com>, peterz@...radead.org,
tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com,
Arnd Bergmann <arnd@...db.de>
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Subject: Re: [PATCH v7 05/15] irqchip: New RISC-V PLIC Driver
On 07/31/2017 05:59 PM, Palmer Dabbelt wrote:
> drivers/irqchip/Kconfig | 13 ++
> drivers/irqchip/Makefile | 1 +
> drivers/irqchip/irq-riscv-plic.c | 370 +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 384 insertions(+)
> create mode 100644 drivers/irqchip/irq-riscv-plic.c
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 7923d3fa8fae..ae5e27f090ec 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -307,6 +307,19 @@ config QCOM_IRQ_COMBINER
> Say yes here to add support for the IRQ combiner devices embedded
> in Qualcomm Technologies chips.
>
> +config RISCV_PLIC
> + bool "Platform-Level Interrupt Controller"
> + depends on RISCV
> + default y
> + help
> + This enables support for the PLIC chip found in standard RISC-V
> + systems. The PLIC controls devices interrupts and connects them to
> + each core's local interrupt controller. Aside from timer and
> + software interrupts, all other interrupt sources (MSI, GPIO, etc)
> + are subordinate to the PLIC.
> +
> + If you don't know what to do here, say Y.
> +
Please use tabs instead of spaces for indenting ("help", "default y", and "bool...").
--
~Randy
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