linux-kernel - Re: [PATCH v3] clk: fractional-divider: fix up the fractional clk's jitter

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Message-ID: <5990882.df1suBpf8V@phil>
Date:   Tue, 01 Aug 2017 18:19:46 +0200
From:   Heiko Stuebner <heiko@...ech.de>
To:     Elaine Zhang <zhangqing@...k-chips.com>
Cc:     mturquette@...libre.com, sboyd@...eaurora.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, huangtao@...k-chips.com,
        cl@...k-chips.com, xxx@...k-chips.com, xf@...k-chips.com
Subject: Re: [PATCH v3] clk: fractional-divider: fix up the fractional clk's jitter

Hi Elaine,

sorry this took a bit longer, but I didn't manage to find the time to
respond properly until now.

Am Freitag, 21. Juli 2017, 16:03:07 CEST schrieb Elaine Zhang:
> Fractional dividers may have special requirements concerning numerator
> and denominator selection that differ from just getting the best
> approximation.
> 
> For example on Rockchip socs the denominator must be at least 20 times
> larger than the numerator to generate precise clock frequencies.
> 
> Therefore add the ability to provide custom approximation functions,
> approx = rockchip_fractional_special_approx;
> but approx = NULL in the default case.
> 
> RK document description:
> 3.1.9  Fractional divider usage
> To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
> fractional divider. Generally you must set that denominator is 20 times
> larger than numerator to generate precise clock frequency. So the
> fractional divider applies only to generate low frequency clock like
> I2S, UART.
> 
> Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
> ---
>  drivers/clk/clk-fractional-divider.c |  4 ++++
>  drivers/clk/rockchip/clk.c           | 20 ++++++++++++++++++++
>  include/linux/clk-provider.h         |  3 +++
>  3 files changed, 27 insertions(+)

The code below does go into the right direction, but I'd really like to
have the full approximation  overrideable. The reason is that while on
Rockchip SoCs it's enough to increase the parent rate, other socs might
have completely different requirements when determining numerator
and denominator.

So I've taken the time and modified your patch into 2 that look like I
would envision it - compile-tested only, so please test :-)
But essentially it only moves some things around but should be
functionally equivalent to your patch.

I'll add the patches as replies to this mail.

Two more things to keep in mind for the future below:

> @@ -145,6 +148,7 @@ struct clk_hw *clk_hw_register_fractional_divider(struct device *dev,
>  	fd->nmask = GENMASK(nwidth - 1, 0) << nshift;
>  	fd->flags = clk_divider_flags;
>  	fd->lock = lock;
> +	fd->approx = NULL;

not needed, as fd is allocated via kzalloc, so this is already NULL.
Also it is nicer to spell approximation full (which I've done in my rework)

[...]

> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index a428aec36ace..807262375292 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -564,6 +564,9 @@ struct clk_fractional_divider {
>  	u8		nwidth;
>  	u32		nmask;
>  	u8		flags;
> +	void            (*approx)(struct clk_hw *hw,

Please keep the spacing in line with other elements. Somehow
here spaces instead of a tab slipped in between void and (*appro...

Heiko