linux-kernel - Re: [PATCH 2/2] iommu/omap: Use DMA-API for performing cache flushes

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Message-ID: <9e59b00e-a6d9-b0a8-8da6-6724d93c3e58@ti.com>
Date:   Tue, 1 Aug 2017 12:38:10 -0500
From:   Suman Anna <s-anna@...com>
To:     Josue Albarran <j-albarran@...com>, Joerg Roedel <joro@...tes.org>
CC:     <iommu@...ts.linux-foundation.org>, <linux-kernel@...r.kernel.org>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        <linux-omap@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 2/2] iommu/omap: Use DMA-API for performing cache flushes

On 07/28/2017 03:49 PM, Josue Albarran wrote:
> The OMAP IOMMU driver was using ARM assembly code directly for
> flushing the MMU page table entries from the caches. This caused
> MMU faults on OMAP4 (Cortex-A9 based SoCs) as L2 caches were not
> handled due to the presence of a PL310 L2 Cache Controller. These
> faults were however not seen on OMAP5/DRA7 SoCs (Cortex-A15 based
> SoCs).
> 
> The OMAP IOMMU driver is adapted to use the DMA Streaming API
> instead now to flush the page table/directory table entries from
> the CPU caches. This ensures that the devices always see the
> updated page table entries. The outer caches are now addressed
> automatically with the usage of the DMA API.
> 
> Signed-off-by: Josue Albarran <j-albarran@...com>

Thanks for fixing this,
Acked-by: Suman Anna <s-anna@...com>

[snip]