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Date:   Tue, 1 Aug 2017 20:55:52 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Radim Krčmář <rkrcmar@...hat.com>
Cc:     Janakarajan Natarajan <Janakarajan.Natarajan@....com>,
        Paolo Bonzini <pbonzini@...hat.com>, x86-ml <x86@...nel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        kvm-ML <kvm@...r.kernel.org>,
        Jörg Rödel <joro@...tes.org>
Subject: [PATCH] x86/cpufeature, kvm/svm: Shorten virtualized VMSAVE/VMLOAD
 flag

On Tue, Aug 01, 2017 at 07:41:11PM +0200, Radim Krčmář wrote:
> I think Janakarajan trimmed the output just to kvm.  I'll start bitching
> about that.

Thanks!

> (PPR for family 17h has it called "v_vmsave_vmload".)

Grr, right, it says "V_VMSAVE_VMLOAD:" but then it says "virtualized VMLOAD
and VMSAVE..."

If people would only make up their mind about the order... But I *think*
the name of the CPUID bit is relevant. Anyway, here's a v2:

---
From: Borislav Petkov <bp@...e.de>
Date: Tue, 1 Aug 2017 17:32:47 +0200
Subject: [PATCH] x86/cpufeature, kvm/svm: Shorten virtualized VMSAVE/VMLOAD flag
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

"virtual_vmload_vmsave" is what is going to land in /proc/cpuinfo now
for a single feature bit which is clearly too long. So call it like it
is called in the processor manual. "v_vmsave_vmload" is a bit shorter,
after all.

We could go more aggressively here but having it the same as in the
processor manual is advantageous.

Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Janakarajan Natarajan <Janakarajan.Natarajan@....com>
Cc: Paolo Bonzini <pbonzini@...hat.com>
Cc: Radim Krčmář <rkrcmar@...hat.com>
---
 arch/x86/include/asm/cpufeatures.h | 2 +-
 arch/x86/kvm/svm.c                 | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index ca3c48c0872f..5a28e8e55e36 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -286,7 +286,7 @@
 #define X86_FEATURE_PAUSEFILTER (15*32+10) /* filtered pause intercept */
 #define X86_FEATURE_PFTHRESHOLD (15*32+12) /* pause filter threshold */
 #define X86_FEATURE_AVIC	(15*32+13) /* Virtual Interrupt Controller */
-#define X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE (15*32+15) /* Virtual VMLOAD VMSAVE */
+#define X86_FEATURE_V_VMSAVE_VMLOAD (15*32+15) /* Virtual VMSAVE VMLOAD */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
 #define X86_FEATURE_AVX512VBMI  (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 4d8141e533c3..f4965cc7ba1e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1100,7 +1100,7 @@ static __init int svm_hardware_setup(void)
 
 	if (vls) {
 		if (!npt_enabled ||
-		    !boot_cpu_has(X86_FEATURE_VIRTUAL_VMLOAD_VMSAVE) ||
+		    !boot_cpu_has(X86_FEATURE_V_VMSAVE_VMLOAD) ||
 		    !IS_ENABLED(CONFIG_X86_64)) {
 			vls = false;
 		} else {
-- 
2.14.0.rc0

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
--

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