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Message-ID: <alpine.DEB.2.20.1708012142530.2682@nanos>
Date: Tue, 1 Aug 2017 21:49:09 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Vikas Shivappa <vikas.shivappa@...ux.intel.com>
cc: vikas.shivappa@...el.com, x86@...nel.org,
linux-kernel@...r.kernel.org, hpa@...or.com, peterz@...radead.org,
ravi.v.shankar@...el.com, tony.luck@...el.com,
fenghua.yu@...el.com, eranian@...gle.com, davidcc@...gle.com,
ak@...ux.intel.com, reinette.chatre@...el.com
Subject: Re: [PATCH 16/28] x86/intel_rdt: Prepare to add RDT monitor cpus
file support
On Tue, 25 Jul 2017, Vikas Shivappa wrote:
> /*
> * The cached intel_pqr_state is strictly per CPU and can never be
> * updated from a remote CPU. Functions which modify the state
> @@ -49,6 +47,8 @@
> */
> DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
>
> +DEFINE_PER_CPU_READ_MOSTLY(struct intel_pqr_state, rdt_cpu_default);
Cacheline wise this is suboptimal. You have to touch two cachelines on each
context switch (at least for read).
If you make that:
struct intel_pqr_state {
u32 default_cosid;
u32 default_rmid;
u32 cur_cosid;
u32 cur_rmid;
};
DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
then it's all together and you spare one cache line.
Thanks,
tglx
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