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Message-ID: <1eaa3317-5dcf-d212-c6fa-f6922bd40441@codeaurora.org>
Date:   Wed, 2 Aug 2017 11:19:52 +0530
From:   Archit Taneja <architt@...eaurora.org>
To:     Abhishek Sahu <absahu@...eaurora.org>, dwmw2@...radead.org,
        computersforpeace@...il.com, boris.brezillon@...e-electrons.com,
        marek.vasut@...il.com, richard@....at, cyrille.pitchen@...ev4u.fr,
        robh+dt@...nel.org, mark.rutland@....com
Cc:     linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        andy.gross@...aro.org, sricharan@...eaurora.org
Subject: Re: [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD_VLD
 register



On 07/19/2017 05:17 PM, Abhishek Sahu wrote:
> The current driver is failing without complete bootchain since
> NAND_DEV_CMD_VLD value is not valid.
> 

Reviewed-by: Archit Taneja <architt@...eaurora.org>

> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
>   drivers/mtd/nand/qcom_nandc.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
> index bc0408c..f3b995d 100644
> --- a/drivers/mtd/nand/qcom_nandc.c
> +++ b/drivers/mtd/nand/qcom_nandc.c
> @@ -148,6 +148,9 @@
>   #define	FETCH_ID			0xb
>   #define	RESET_DEVICE			0xd
>   
> +/* Value for NAND_DEV_CMD_VLD */
> +#define NAND_DEV_CMD_VLD_VAL		0x1d
> +
>   /*
>    * the NAND controller performs reads/writes with ECC in 516 byte chunks.
>    * the driver calls the chunks 'step' or 'codeword' interchangeably
> @@ -1972,6 +1975,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
>   {
>   	/* kill onenand */
>   	nandc_write(nandc, SFLASHC_BURST_CFG, 0);
> +	nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
>   
>   	/* enable ADM DMA */
>   	nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN);
> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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