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Message-ID: <20170802154600.rey4kmcn6lwri7a3@hirez.programming.kicks-ass.net>
Date: Wed, 2 Aug 2017 17:46:00 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>
Cc: Will Deacon <will.deacon@....com>, torvalds@...ux-foundation.org,
oleg@...hat.com, paulmck@...ux.vnet.ibm.com, mpe@...erman.id.au,
npiggin@...il.com, linux-kernel@...r.kernel.org, mingo@...nel.org,
stern@...land.harvard.edu, Mel Gorman <mgorman@...e.de>,
Rik van Riel <riel@...hat.com>
Subject: Re: [RFC][PATCH 1/5] mm: Rework {set,clear,mm}_tlb_flush_pending()
On Wed, Aug 02, 2017 at 11:57:04PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2017-08-02 at 10:11 +0200, Peter Zijlstra wrote:
>
> > which should be completely ordered against anything prior and anything
> > following, and is I think the behaviour we want from TLB flushes in
> > general, but is very much not provided by a number of architectures
> > afaict.
> >
> > Ah, found the hash-64 code, yes that's good too. The hash32 code lives
> > in asm and confuses me, it has a bunch of SYNC, SYNC_601 and isync in.
> > The nohash variant seems to do a isync after tlbwe, but again no clue.
>
> Doing some archeology ? :-)
I thought ppc32 is still a popular platform for embedded, and not
actually knowing what kind of mmu those sport (if one at all of course),
I just looked at all of them.
Also, I'd been looking at all arch tlb invalidate code in any case :-)
(and yes my head hurts because of it)
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