linux-kernel - Re: [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD

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Message-ID: <20170803174713.5b5f5dde@bbrezillon>
Date:   Thu, 3 Aug 2017 17:47:13 +0200
From:   Boris Brezillon <boris.brezillon@...e-electrons.com>
To:     Abhishek Sahu <absahu@...eaurora.org>
Cc:     dwmw2@...radead.org, computersforpeace@...il.com,
        marek.vasut@...il.com, richard@....at, cyrille.pitchen@...ev4u.fr,
        robh+dt@...nel.org, mark.rutland@....com,
        linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        andy.gross@...aro.org, architt@...eaurora.org,
        sricharan@...eaurora.org
Subject: Re: [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD_VLD
 register

On Wed, 19 Jul 2017 17:17:50 +0530
Abhishek Sahu <absahu@...eaurora.org> wrote:

> The current driver is failing without complete bootchain since
> NAND_DEV_CMD_VLD value is not valid.
> 
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
>  drivers/mtd/nand/qcom_nandc.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
> index bc0408c..f3b995d 100644
> --- a/drivers/mtd/nand/qcom_nandc.c
> +++ b/drivers/mtd/nand/qcom_nandc.c
> @@ -148,6 +148,9 @@
>  #define	FETCH_ID			0xb
>  #define	RESET_DEVICE			0xd
>  
> +/* Value for NAND_DEV_CMD_VLD */
> +#define NAND_DEV_CMD_VLD_VAL		0x1d

Where does this 0x1d value comes from? Defining a macro instead of
passing 0x1d does not change the fact that this is a magic value :-).

> +
>  /*
>   * the NAND controller performs reads/writes with ECC in 516 byte chunks.
>   * the driver calls the chunks 'step' or 'codeword' interchangeably
> @@ -1972,6 +1975,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
>  {
>  	/* kill onenand */
>  	nandc_write(nandc, SFLASHC_BURST_CFG, 0);
> +	nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
>  
>  	/* enable ADM DMA */
>  	nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN);