lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 4 Aug 2017 12:28:43 +0530
From:   Vineet Gupta <Vineet.Gupta1@...opsys.com>
To:     Thomas Gleixner <tglx@...utronix.de>
CC:     Viresh Kumar <viresh.kumar@...aro.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "john.stultz@...aro.org" <john.stultz@...aro.org>,
        "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
        "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Alexey Brodkin <Alexey.Brodkin@...opsys.com>
Subject: Re: update timer frequencies

Hi Thomas,

On 03/10/2017 03:58 PM, Thomas Gleixner wrote:
> Vlad,
> 
> On Fri, 10 Mar 2017, Vlad Zakharov wrote:
>>
>> I am trying to implement a cpufreq driver for ARC CPUs.  The point is
>> that ARC timers (including those are used for timekeeping) are driven by
>> the same clock as ARC CPU core(s).
> 
> To be honest: That's broken by design and you really should go and tell
> your hardware folks to fix that. Proper timekeeping is essential for any
> Operating System (not only Linux).
> 
> It's well known for more than TWO decades that changing the frequency of
> the timekeeper clocksource is a complete disaster, but obviously every
> hardware vendor has to learn that the hard way instead of simply learning
> from history.
> 
...
> 
> Your hardware design is broken by making the clocksource clock depend on
> the CPU frequency. Tell your hardware people to fix that or just use a
> seperate independent clocksource.

The hardware is being changed and I had a couple of questions to help do it right:

1. The clocksource timers TIMER1, GFRC, RTC etc will now be clocked independent of 
core using a fixed clk. Is there some magic freq value which best works so we can 
recommend that to implementors. AFAIKR ARM has 24 MHz.

2. I'm not sure if the timer generating interrupts (periodic or oneshot) needs to 
be fed invariant fixed clk or dynamic core clk. Naively it should follow the core 
- but what happens to scheduled timers (say TCP timeouts): if this clk changes - 
they need to be canceled/updated. If it doesn't then the notion of timing is 
broken ? I'm likely not thinking this through correctly.

Thx,
-Vineet

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ