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Message-ID: <20170804094656.56184d79@bbrezillon>
Date: Fri, 4 Aug 2017 09:46:56 +0200
From: Boris Brezillon <boris.brezillon@...e-electrons.com>
To: Abhishek Sahu <absahu@...eaurora.org>
Cc: dwmw2@...radead.org, computersforpeace@...il.com,
marek.vasut@...il.com, richard@....at, cyrille.pitchen@...ev4u.fr,
robh+dt@...nel.org, mark.rutland@....com,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
andy.gross@...aro.org, architt@...eaurora.org,
sricharan@...eaurora.org, stable@...r.kernel.org
Subject: Re: [PATCH v2 01/25] mtd: nand: qcom: fix config error for BCH
On Wed, 19 Jul 2017 17:17:49 +0530
Abhishek Sahu <absahu@...eaurora.org> wrote:
> The configuration for BCH is not correct in the current driver.
> The ECC_CFG_ECC_DISABLE bit defines whether to enable or disable the
> BCH ECC in which
>
> 0x1 : BCH_DISABLED
> 0x0 : BCH_ENABLED
>
> But currently host->bch_enabled is being assined to BCH_DISABLED.
>
> Fixes: c76b78d8ec05a ("mtd: nand: Qualcomm NAND controller driver")
> Cc: stable@...r.kernel.org
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
> ---
> drivers/mtd/nand/qcom_nandc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
> index 57d483a..bc0408c 100644
> --- a/drivers/mtd/nand/qcom_nandc.c
> +++ b/drivers/mtd/nand/qcom_nandc.c
> @@ -1,5 +1,5 @@
> /*
> - * Copyright (c) 2016, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Applied to nand/next after removing the above line.
> *
> * This software is licensed under the terms of the GNU General Public
> * License version 2, as published by the Free Software Foundation, and
> @@ -1893,7 +1893,7 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
> | wide_bus << WIDE_FLASH
> | 1 << DEV0_CFG1_ECC_DISABLE;
>
> - host->ecc_bch_cfg = host->bch_enabled << ECC_CFG_ECC_DISABLE
> + host->ecc_bch_cfg = !host->bch_enabled << ECC_CFG_ECC_DISABLE
> | 0 << ECC_SW_RESET
> | host->cw_data << ECC_NUM_DATA_BYTES
> | 1 << ECC_FORCE_CLK_OPEN
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