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Message-Id: <1501949998-29859-19-git-send-email-absahu@codeaurora.org>
Date: Sat, 5 Aug 2017 21:49:56 +0530
From: Abhishek Sahu <absahu@...eaurora.org>
To: dwmw2@...radead.org, boris.brezillon@...e-electrons.com,
computersforpeace@...il.com, marek.vasut@...il.com,
robh+dt@...nel.org, mark.rutland@....com
Cc: richard@....at, cyrille.pitchen@...ev4u.fr,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
andy.gross@...aro.org, architt@...eaurora.org,
sricharan@...eaurora.org, Abhishek Sahu <absahu@...eaurora.org>
Subject: [PATCH v3 18/20] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
which uses BAM DMA Engine.
Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index d93b952..8dfa543 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -6,6 +6,8 @@ Required properties:
SoC and it uses ADM DMA
* "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
IPQ4019 SoC and it uses BAM DMA
+ * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
+ IPQ8074 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock
@@ -97,7 +99,7 @@ nand-controller@...00000 {
};
nand-controller@...0000 {
- compatible = "qcom,ipq4019-nand";
+ compatible = "qcom,ipq4019-nand", "qcom,ipq8074-nand";
reg = <0x79b0000 0x1000>;
clocks = <&gcc GCC_QPIC_CLK>,
--
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