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Message-Id: <20170807014641.4003-2-chris.packham@alliedtelesis.co.nz>
Date: Mon, 7 Aug 2017 13:46:38 +1200
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: robh+dt@...nel.org, gregory.clement@...e-electrons.com,
bp@...en8.de, jlu@...gutronix.de,
linux-arm-kernel@...ts.infradead.org, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Chris Packham <chris.packham@...iedtelesis.co.nz>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Mark Rutland <mark.rutland@....com>,
Russell King <linux@...linux.org.uk>,
devicetree@...r.kernel.org
Subject: [RESEND PATCH 1/4] ARM: dts: enable L2 cache parity and ecc on db-xc3-24g4xg board
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
---
arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
index 06fce35d7491..00ca489fc788 100644
--- a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
+++ b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
@@ -70,6 +70,11 @@
};
};
+&L2 {
+ arm,parity-enable;
+ marvell,ecc-enable;
+};
+
&devbus_bootcs {
status = "okay";
--
2.13.0
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