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Message-Id: <91fd6532076e4c905b5a228d852bba4941c54a28.1502091561.git.michal.simek@xilinx.com>
Date: Mon, 7 Aug 2017 09:39:23 +0200
From: Michal Simek <michal.simek@...inx.com>
To: linux-kernel@...r.kernel.org, monstr@...str.eu
Cc: devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH v2 1/6] devicetree: Extend synopsys ddrc binding for Xilinx ZynqMP
Add ZynqMP support to Synopsys memory controller.
Signed-off-by: Michal Simek <michal.simek@...inx.com>
---
Changes in v2:
- New patch in this series
.../devicetree/bindings/memory-controllers/synopsys.txt | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
index a43d26d41e04..08c058d5ad76 100644
--- a/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys.txt
@@ -5,11 +5,23 @@ configuration. The ECC controller corrects one bit error and detects
two bit errors.
Required properties:
- - compatible: Should be 'xlnx,zynq-ddrc-a05'
+ - compatible: Should be 'xlnx,zynq-ddrc-a05' for Zynq
+ and 'xlnx,zynqmp-ddrc-2.40a' for ZynqMP
- reg: Base address and size of the controllers memory area
+ - interrupt-parent: Should be core interrupt controller
+ valid for ZynqMP DDR Controller
+ - interrupts: Property with a value describing the interrupt number
+ valid for ZynqMP DDR Controller
Example:
memory-controller@...06000 {
compatible = "xlnx,zynq-ddrc-a05";
reg = <0xf8006000 0x1000>;
};
+
+ mc: memory-controller@...70000 {
+ compatible = "xlnx,zynqmp-ddrc-2.40a";
+ reg = <0x0 0xfd070000 0x0 0x30000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 112 4>;
+ };
--
1.9.1
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