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Message-Id: <3xQvGp1NXbz9tWT@ozlabs.org>
Date: Mon, 7 Aug 2017 20:41:53 +1000 (AEST)
From: Michael Ellerman <patch-notifications@...erman.id.au>
To: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>,
Michael Neuling <mikey@...ling.org>,
Nicholas Piggin <npiggin@...il.com>,
Vaidyanathan Srinivasan <svaidy@...ux.vnet.ibm.com>,
Shilpasri G Bhat <shilpa.bhat@...ux.vnet.ibm.com>,
Akshay Adiga <akshay.adiga@...ux.vnet.ibm.com>
Cc: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [v3, 1/2] powernv/powerpc:Save/Restore additional SPRs for stop4 cpuidle
On Fri, 2017-07-21 at 10:41:37 UTC, "Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>
>
> The stop4 idle state on POWER9 is a deep idle state which loses
> hypervisor resources, but whose latency is low enough that it can be
> exposed via cpuidle.
>
> Until now, the deep idle states which lose hypervisor resources (eg:
> winkle) were only exposed via CPU-Hotplug. Hence currently on wakeup
> from such states, barring a few SPRs which need to be restored to
> their older value, rest of the SPRS are reinitialized to their values
> corresponding to that at boot time.
>
> When stop4 is used in the context of cpuidle, we want these additional
> SPRs to be restored to their older value, to ensure that the context
> on the CPU coming back from idle is same as it was before going idle.
>
> In this patch, we define a SPR save area in PACA (since we have used
> up the volatile register space in the stack) and on POWER9, we restore
> SPRN_PID, SPRN_LDBAR, SPRN_FSCR, SPRN_HFSCR, SPRN_MMCRA, SPRN_MMCR1,
> SPRN_MMCR2 to the values they had before entering stop.
>
> Signed-off-by: Gautham R. Shenoy <ego@...ux.vnet.ibm.com>
> Reviewed-by: Nicholas Piggin <npiggin@...il.com>
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/e1c1cfed54326fd2b17c78f0c85092
cheers
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