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Message-ID: <c997b792-567d-4b1e-ab12-22198d863ff5@redhat.com>
Date: Mon, 7 Aug 2017 12:45:45 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: "Longpeng(Mike)" <longpeng2@...wei.com>, rkrcmar@...hat.com
Cc: agraf@...e.com, borntraeger@...ibm.com, cohuck@...hat.com,
christoffer.dall@...aro.org, marc.zyngier@....com,
james.hogan@...tec.com, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org, weidong.huang@...wei.com,
arei.gonglei@...wei.com, wangxinxin.wang@...wei.com,
longpeng.mike@...il.com, david@...hat.com
Subject: Re: [PATCH 2/3] KVM: X86: implement the logic for spinlock
optimization
On 07/08/2017 10:44, Longpeng(Mike) wrote:
> +
> + /*
> + * Intel sdm vol3 ch-25.1.3 says: The “PAUSE-loop exiting”
> + * VM-execution control is ignored if CPL > 0. So the vcpu
> + * is always exiting with CPL=0 if it uses PLE.
This is not true (how can it be?). What 25.1.3 says is, the VCPU is
always at CPL=0 if you get a PAUSE exit (reason 40) and PAUSE exiting is
0 (it always is for KVM). But here you're looking for a VCPU that
didn't get a PAUSE exit, so the CPL can certainly be 3.
However, I understand that vmx_get_cpl can be a bit slow here. You can
actually read SS's access rights directly in this function and get the
DPL from there, that's going to be just a single VMREAD.
The only difference is when vmx->rmode.vm86_active=1. However,
pause-loop exiting is not working properly anyway if
vmx->rmode.vm86_active=1, because CPL=3 according to the processor.
Paolo
> + * The following block needs less cycles than vmx_get_cpl().
> + */
> + if (cpu_has_secondary_exec_ctrls())
> + secondary_exec_ctrl = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
> + if (secondary_exec_ctrl & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
> + return true;
> +
Paolo
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