linux-kernel - Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328 SoC

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Message-ID: <903bc8ea-a597-80b9-a2bf-551c1b6288fb@rock-chips.com>
Date:   Fri, 11 Aug 2017 17:45:00 +0800
From:   "rocky.hao" <rocky.hao@...k-chips.com>
To:     Caesar Wang <wxt@...k-chips.com>, rui.zhang@...el.com,
        edubezval@...il.com, heiko@...ech.de, robh+dt@...nel.org,
        mark.rutland@....com, catalin.marinas@....com, will.deacon@....com
Cc:     huangtao@...k-chips.com, devicetree@...r.kernel.org,
        linux-pm@...r.kernel.org, shawn.lin@...k-chips.com,
        linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org,
        cl@...k-chips.com, william.wu@...k-chips.com,
        jay.xu@...k-chips.com, xxx@...k-chips.com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 3/5] arm64: dts: rockchip: add tsadc node for rk3328
 SoC



在 2017/8/11 14:38, Caesar Wang 写道:
> 在 2017年08月04日 16:06, Rocky Hao 写道:
>> add tsadc needed main information for rk3328 SoC.
>> 50000Hz is the max clock rate supported by tsadc module.
>>
>> Signed-off-by: Rocky Hao <rocky.hao@...k-chips.com>
>> ---
>> Change in v2:
>> - remove gerrit Change-Id
>>
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi 
>> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index db4b2708084d..186fb93fdffd 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -308,6 +308,26 @@
>>           interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>>       };
>> +    tsadc: tsadc@...50000 {
>> +        compatible = "rockchip,rk3328-tsadc";
>> +        reg = <0x0 0xff250000 0x0 0x100>;
>> +        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
>> +        rockchip,grf = <&grf>;
>> +        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
>> +        clock-names = "tsadc", "apb_pclk";
>> +        assigned-clocks = <&cru SCLK_TSADC>;
>> +        assigned-clock-rates = <50000>;
>> +        resets = <&cru SRST_TSADC>;
>> +        reset-names = "tsadc-apb";
>> +        pinctrl-names = "init", "default", "sleep";
>> +        pinctrl-0 = <&otp_gpio>;
>> +        pinctrl-1 = <&otp_out>;
>> +        pinctrl-2 = <&otp_gpio>;
>> +        #thermal-sensor-cells = <1>;
> 
> Only one sensor, so maybe the value should be 0.
Caesar, #thermal-sensor-cells means parameter counts used to match the 
proper sensor registered. Both 0 and 1 work well.

Case 0, i.e. #thermal-sensor-cells = <0>, it uses the default channel 
number 0 to match tsadc channal.
Case 1, i.e. #thermal-sensor-cells = <1>, it uses the setting 
"thermal-sensors = <&tsadc 0>;" to match tsadc channal.

Case 1 provides more readable info than case 0. By my understanding, 
using the default value such as case 0, is not a good coding style.

> 
>> +        rockchip,hw-tshut-temp = <100000>;
>> +        status = "disabled";
>> +    };
>> +
>>       saradc: adc@...80000 {
>>           compatible = "rockchip,rk3328-saradc", 
>> "rockchip,rk3399-saradc";
>>           reg = <0x0 0xff280000 0x0 0x100>;
> 
> 
> 
>