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Message-Id: <1502451575-15712-19-git-send-email-absahu@codeaurora.org>
Date: Fri, 11 Aug 2017 17:09:33 +0530
From: Abhishek Sahu <absahu@...eaurora.org>
To: boris.brezillon@...e-electrons.com, robh+dt@...nel.org
Cc: dwmw2@...radead.org, computersforpeace@...il.com,
marek.vasut@...il.com, richard@....at, cyrille.pitchen@...ev4u.fr,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
andy.gross@...aro.org, architt@...eaurora.org,
sricharan@...eaurora.org, Abhishek Sahu <absahu@...eaurora.org>,
mark.rutland@....com
Subject: [PATCH v4 18/20] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation
Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0
which uses BAM DMA Engine.
Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
---
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index d93b952..73d336be 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -6,6 +6,8 @@ Required properties:
SoC and it uses ADM DMA
* "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in
IPQ4019 SoC and it uses BAM DMA
+ * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
+ IPQ8074 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock
--
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