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Message-ID: <4bba0de8-cb15-9f1a-5ecc-61d03804d5da@rock-chips.com>
Date:   Fri, 11 Aug 2017 09:46:34 +0800
From:   Frank Wang <frank.wang@...k-chips.com>
To:     Rob Herring <robh@...nel.org>
Cc:     heiko@...ech.de, kishon@...com, mark.rutland@....com,
        gregkh@...uxfoundation.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-rockchip@...ts.infradead.org, huangtao@...k-chips.com,
        william.wu@...k-chips.com, daniel.meng@...k-chips.com,
        kever.yang@...k-chips.com, andy.yan@...k-chips.com,
        wmc@...k-chips.com
Subject: Re: [PATCH v3 4/5] dt-bindings: phy-rockchip-inno-usb2: add otg-mux
 interrupt

Hi Rob,

On 2017/8/11 1:06, Rob Herring wrote:
> On Thu, Aug 03, 2017 at 04:09:12PM +0800, Frank Wang wrote:
>> Add otg-mux property to support multiplexed interrupt in otg-port
>> on some Rockchip SoC (e.g RV1108).
>>
>> Signed-off-by: Frank Wang <frank.wang@...k-chips.com>
>> ---
>>   Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | 6 +++++-
>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
>> index ddf868a..ed6aee4 100644
>> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
>> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt
>> @@ -32,10 +32,14 @@ Required nodes : a sub-node is required for each port the phy provides.
>>   Required properties (port (child) node):
>>    - #phy-cells : must be 0. See ./phy-bindings.txt for details.
>>    - interrupts : specify an interrupt for each entry in interrupt-names.
>> - - interrupt-names : a list which shall be the following entries:
>> + - interrupt-names : a list which should be one of the following cases:
>> +	Regular case:
>>   	* "otg-id" : for the otg id interrupt.
>>   	* "otg-bvalid" : for the otg vbus interrupt.
>>   	* "linestate" : for the host/otg linestate interrupt.
>> +	Some SoCs use one interrupt with the obove muxed together, so for these
> s/obove/above/

Sorry, thanks for your reminding and will fix.


BR.
Frank

>
> With that,
>
> Acked-by: Rob Herring <robh@...nel.org>
>
>
>


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